From patchwork Fri Oct 13 21:28:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 733286 Delivered-To: patch@linaro.org Received: by 2002:a5d:54d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1679010wrv; Fri, 13 Oct 2023 14:33:48 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEikYDvLs4/6nJUDYcBX3ueDWjmjJJP1WjCoczJrF943UfQHIP56k40YJp/SACZRuQD4BbW X-Received: by 2002:a67:f918:0:b0:452:8e07:db61 with SMTP id t24-20020a67f918000000b004528e07db61mr26585681vsq.6.1697232828544; Fri, 13 Oct 2023 14:33:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697232828; cv=none; d=google.com; s=arc-20160816; b=YoJvuo7ygHZSzyB4XNyeV62Aj84EecB4GLXnfLAtDMEejdqizz+dznUhje0mwn2UyL vQxI5KAgo7gswnnTt6usmRUAagZm7v7Pcn2XRA6BeizdFrX9MVX3ApkXFcQ5lLXEQzRQ JYqOyK5wpL9gSqg76gcC3sbl7H75fGR+SwzffjxW8QXwDzV4fOmKZnNxFddQy4VJDJTP wbD53fLbxHIPkAn7o2Y1UU4sdxl4M9P4kx0wt3NwCgD5Q9sZUyCdnqrMp4d8bpHXlK8s t3rquVH2guj6SPL2tqjO3WPd+AQxzVgAeF2cId7nS6XFLkEZ7QELzijpa0cE22PaaAW0 pgGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=oooruiOv6h7ka+dZCOXFZY2mCMK7kriizLGIpTmucAw=; fh=OY/jf0qYEhT53LcIJp8d/e39mN3vEzshkseI36O8N8s=; b=xietCL6bLOjDjZj6+bEZbMrjTOGZgrTWf8wAbpcFBd6V1q0nXRHrKnWv77/mXp/wWg ZOQKi/+9IPfUvNTmFMPzBjL+yln+YDw8K8oT8ahQbX+3D2Ka4vdvPk4VztazYFNYA/T8 vbjC2nodpeKjvlq8cWqsatAVAhwqXjOQkQqLTEX7EI3ueqpkiErANeckiFHiS9NW0lCg P+NbNFYM6kMPMsg86WF27zDPKtFU6N3lYduuKNAu4NSEGQtbzWRqn/7B8nOp0lr0Las6 VT8dsE6DMK7RvjvUQHAiIcGyNSGODXHqqyKgY/2JHd0UbnufPraKz05Ys1CCdmpGBp/X 333Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="LR/4Y3MD"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id s17-20020a05622a019100b004198b1c4a85si1847051qtw.757.2023.10.13.14.33.48 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 13 Oct 2023 14:33:48 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="LR/4Y3MD"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qrPmE-00029R-5V; Fri, 13 Oct 2023 17:32:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qrPmA-0001nL-PE for qemu-devel@nongnu.org; Fri, 13 Oct 2023 17:32:54 -0400 Received: from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qrPm8-0001YO-Vg for qemu-devel@nongnu.org; Fri, 13 Oct 2023 17:32:54 -0400 Received: by mail-pf1-x436.google.com with SMTP id d2e1a72fcca58-6b5cac99cfdso649765b3a.2 for ; Fri, 13 Oct 2023 14:32:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697232772; x=1697837572; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oooruiOv6h7ka+dZCOXFZY2mCMK7kriizLGIpTmucAw=; b=LR/4Y3MDtdeen5kZfI3YAfkaGy5Df/b0xiQchwpUBa/lxrgpPUcYCKFCIV5OBF0p+B Ee+qxcJjPcB8UGLRjapB1mKi4zy+ZvkDWt0uEtPgYBOe8lMx20S0OCvGGhYeGyVmIYxq qwqUOloN0J885Gzsxwo8B0rBQ4+TCOxBblH5Nwyp4qHGAVEjX00ar+07zwAUSdFNIs/e iCS3V5YHLhodTcU7O3/NkqjFUsq0m0XTV7ebVE22Huu2jWJiB21ahOpGTA6JCPbvQc39 eyYE2NYQbozAWeqEn4FfzlXJzWu4gz7/suyAKi5tUhisM/SVKCVX3cbaSGQ2LhZ8tsTW Qn/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697232772; x=1697837572; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oooruiOv6h7ka+dZCOXFZY2mCMK7kriizLGIpTmucAw=; b=ahyd8IvA1MRCfDrcFm2ofZE2RfeKpn5Kivp3Wk7mDQuVtBkk//kRHnNuNLHMRQpNEb vEzhKO58UG51rIBc8JlfMEi9PAEdILvk1AgU4gXK7EfE741rzQhvDh19mEgMAVtmCv5E PnW+6zeZNKVrQTgEJ9uzVIEovW5izE7G6V7Nq22wh9Wwis8pE53WSfa5ggSVjNOY+wyn XYjGFAKR0EshE75pNGijxarcXVfNCLLbnxjD3UacB1Yiq1IuBO6wsB7UFnMFXw52Zlsa oqP+yKTwnPINcLa8NV8V5Jojk13gOLocf2Z91trJf16iSy8uYpaAnH1wyceo/S/tROCt VqDQ== X-Gm-Message-State: AOJu0YxpKoASJUizkf9KVTUxTTfAondiKyBqLZDWLodXNazuMklfmdmM ekDRy5Ma3Mq63/EjuXvGX5MdTvy+QFk9EcNhTtI= X-Received: by 2002:a05:6a00:21c5:b0:692:af9c:d96a with SMTP id t5-20020a056a0021c500b00692af9cd96amr27416782pfj.5.1697232771712; Fri, 13 Oct 2023 14:32:51 -0700 (PDT) Received: from stoup.. ([71.212.149.95]) by smtp.gmail.com with ESMTPSA id j5-20020aa78d05000000b0068842ebfd10sm13977191pfe.160.2023.10.13.14.32.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Oct 2023 14:32:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: mark.cave-ayland@ilande.co.uk, atar4qemu@gmail.com Subject: [PATCH 69/85] target/sparc: Move gen_fop_DDD insns to decodetree Date: Fri, 13 Oct 2023 14:28:30 -0700 Message-Id: <20231013212846.165724-70-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231013212846.165724-1-richard.henderson@linaro.org> References: <20231013212846.165724-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Move FADDd, FSUBd, FMULd, FDIVd. Signed-off-by: Richard Henderson --- target/sparc/insns.decode | 4 +++ target/sparc/translate.c | 55 ++++++++++++++++++++------------------- 2 files changed, 32 insertions(+), 27 deletions(-) diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index fcf4704ef8..5c7b918462 100644 --- a/target/sparc/insns.decode +++ b/target/sparc/insns.decode @@ -243,9 +243,13 @@ FSQRTs 10 ..... 110100 00000 0 0010 1001 ..... @r_r2 FSQRTd 10 ..... 110100 00000 0 0010 1010 ..... @r_r2 FSQRTq 10 ..... 110100 00000 0 0010 1011 ..... @r_r2 FADDs 10 ..... 110100 ..... 0 0100 0001 ..... @r_r_r +FADDd 10 ..... 110100 ..... 0 0100 0010 ..... @r_r_r FSUBs 10 ..... 110100 ..... 0 0100 0101 ..... @r_r_r +FSUBd 10 ..... 110100 ..... 0 0100 0110 ..... @r_r_r FMULs 10 ..... 110100 ..... 0 0100 1001 ..... @r_r_r +FMULd 10 ..... 110100 ..... 0 0100 1010 ..... @r_r_r FDIVs 10 ..... 110100 ..... 0 0100 1101 ..... @r_r_r +FDIVd 10 ..... 110100 ..... 0 0100 1110 ..... @r_r_r FdTOx 10 ..... 110100 00000 0 1000 0010 ..... @r_r2 FxTOd 10 ..... 110100 00000 0 1000 1000 ..... @r_r2 FiTOs 10 ..... 110100 00000 0 1100 0100 ..... @r_r2 diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 9d68c8cc20..b7e0207405 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -1526,21 +1526,6 @@ static void gen_op_clear_ieee_excp_and_FTT(void) tcg_gen_andi_tl(cpu_fsr, cpu_fsr, FSR_FTT_CEXC_NMASK); } -static void gen_fop_DDD(DisasContext *dc, int rd, int rs1, int rs2, - void (*gen)(TCGv_i64, TCGv_ptr, TCGv_i64, TCGv_i64)) -{ - TCGv_i64 dst, src1, src2; - - src1 = gen_load_fpr_D(dc, rs1); - src2 = gen_load_fpr_D(dc, rs2); - dst = gen_dest_fpr_D(dc, rd); - - gen(dst, tcg_env, src1, src2); - gen_helper_check_ieee_exceptions(cpu_fsr, tcg_env); - - gen_store_fpr_D(dc, rd, dst); -} - #ifdef TARGET_SPARC64 static void gen_ne_fop_QQ(DisasContext *dc, int rd, int rs, void (*gen)(TCGv_ptr)) @@ -4920,6 +4905,30 @@ TRANS(FPACK32, VIS1, do_ddd, a, gen_op_fpack32) TRANS(FALIGNDATAg, VIS1, do_ddd, a, gen_op_faligndata) TRANS(BSHUFFLE, VIS2, do_ddd, a, gen_op_bshuffle) +static bool do_env_ddd(DisasContext *dc, arg_r_r_r *a, + void (*func)(TCGv_i64, TCGv_env, TCGv_i64, TCGv_i64)) +{ + TCGv_i64 dst, src1, src2; + + if (gen_trap_ifnofpu(dc)) { + return true; + } + + gen_op_clear_ieee_excp_and_FTT(); + dst = gen_dest_fpr_D(dc, a->rd); + src1 = gen_load_fpr_D(dc, a->rs1); + src2 = gen_load_fpr_D(dc, a->rs2); + func(dst, tcg_env, src1, src2); + gen_helper_check_ieee_exceptions(cpu_fsr, tcg_env); + gen_store_fpr_D(dc, a->rd, dst); + return advance_pc(dc); +} + +TRANS(FADDd, ALL, do_env_ddd, a, gen_helper_faddd) +TRANS(FSUBd, ALL, do_env_ddd, a, gen_helper_fsubd) +TRANS(FMULd, ALL, do_env_ddd, a, gen_helper_fmuld) +TRANS(FDIVd, ALL, do_env_ddd, a, gen_helper_fdivd) + static bool do_dddd(DisasContext *dc, arg_r_r_r *a, void (*func)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64)) { @@ -4997,31 +5006,23 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn) case 0x45: /* fsubs */ case 0x49: /* fmuls */ case 0x4d: /* fdivs */ - g_assert_not_reached(); /* in decodetree */ case 0x42: /* faddd */ - gen_fop_DDD(dc, rd, rs1, rs2, gen_helper_faddd); - break; + case 0x46: /* fsubd */ + case 0x4a: /* fmuld */ + case 0x4e: /* fdivd */ + g_assert_not_reached(); /* in decodetree */ case 0x43: /* faddq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_fop_QQQ(dc, rd, rs1, rs2, gen_helper_faddq); break; - case 0x46: /* fsubd */ - gen_fop_DDD(dc, rd, rs1, rs2, gen_helper_fsubd); - break; case 0x47: /* fsubq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_fop_QQQ(dc, rd, rs1, rs2, gen_helper_fsubq); break; - case 0x4a: /* fmuld */ - gen_fop_DDD(dc, rd, rs1, rs2, gen_helper_fmuld); - break; case 0x4b: /* fmulq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_fop_QQQ(dc, rd, rs1, rs2, gen_helper_fmulq); break; - case 0x4e: /* fdivd */ - gen_fop_DDD(dc, rd, rs1, rs2, gen_helper_fdivd); - break; case 0x4f: /* fdivq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_fop_QQQ(dc, rd, rs1, rs2, gen_helper_fdivq);