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[209.51.188.17]) by mx.google.com with ESMTPS id od15-20020a0562142f0f00b0066d16ed048bsi1263964qvb.134.2023.10.13.07.05.21 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 13 Oct 2023 07:05:21 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BuR4CrcQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qrIma-0005HG-Cj; Fri, 13 Oct 2023 10:04:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qrIlR-0000jE-AV for qemu-devel@nongnu.org; Fri, 13 Oct 2023 10:03:43 -0400 Received: from mail-ed1-x529.google.com ([2a00:1450:4864:20::529]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qrIlK-0002db-NX for qemu-devel@nongnu.org; Fri, 13 Oct 2023 10:03:41 -0400 Received: by mail-ed1-x529.google.com with SMTP id 4fb4d7f45d1cf-53dfc28a2afso3701707a12.1 for ; Fri, 13 Oct 2023 07:03:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697205813; x=1697810613; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QrvfAY2mn68woULbVz677TRglvUf81ZbqsLucDKzz7I=; b=BuR4CrcQgvTLeeaTMb8Bk3H5XdhPsgW98bz4La7ZOnNL3QvJersAfWaAy0I1UN+AXZ LXqF9y/SKBSrq5nkyRn81BiVFwp19C3XvwOx8T8wIfOa+FXb8wcfmq950jUuTqKb9tkm w49Fn6qLw/Xcly8Qklr83OCeG7SQZq26Ymkv16BN0B7dIzKxrCT2Yk6E/FCHhCsYewD1 ktx6dYgzD/pdwTxruhG5Tx1qo1Rog2qa9+JNkoHSkBuLh4E1mDCPaJdlcAZe0oosaBgC 8Cbz8ETlCMttoJ78NEwqhQP1O+M2DCyTDu3QWV2lT8sZOTmX5h9FFCZrY5koN3Dvfd4z E0Uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697205813; x=1697810613; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QrvfAY2mn68woULbVz677TRglvUf81ZbqsLucDKzz7I=; b=TTPyhhFPe1S91cr26NDdBOLl2y0CvcxCQu0T4y5Cz7v/zwN18TFLovOH1YQyOf9qBf ZOQJnFKiMuSGS3FHz3KG3P9uSp/R5JPJOngsOLxOHrzOZUaEnd6eCgXZ5IMTMBrQsjdm n3lJlFpTeuGY7jC595faNm1zBI1gO1mJt3DKsVWd8euQD+j13kFZXc9cHSXnxMDntiJK Q2kHAenwuvF/msxma2NLm5vuMnl9IHRwBafqCcUtTAtRL4BxLvXn1G3bLSqbJ3TZjGSB qrosUHfB39IrY/4VJ79XZwljZ9fYFrDWXa53+aV2RtnHjHoIYzPwyJqxT73cfH95gH5p hsxg== X-Gm-Message-State: AOJu0YwM4W9R1FipyT+KUWkASvVrNWZcsvZUkDsUANRahzSffPylV0lO +yETVQR6bPxwIO/8pGOeSyFaTcVfgDxyo1Bp6fE= X-Received: by 2002:a17:906:23f2:b0:9b2:6db8:e0fa with SMTP id j18-20020a17090623f200b009b26db8e0famr22738729ejg.41.1697205813224; Fri, 13 Oct 2023 07:03:33 -0700 (PDT) Received: from m1x-phil.lan ([176.172.118.168]) by smtp.gmail.com with ESMTPSA id p8-20020a170906b20800b009adce1c97ccsm12437059ejz.53.2023.10.13.07.03.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 13 Oct 2023 07:03:32 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Eduardo Habkost , Xiaojuan Yang , "Michael S. Tsirkin" , qemu-ppc@nongnu.org, Aleksandar Rikalo , David Hildenbrand , qemu-s390x@nongnu.org, "Edgar E. Iglesias" , Jiaxun Yang , Song Gao , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Paolo Bonzini , Stafford Horne , Alistair Francis , Yanan Wang , Max Filippov , Artyom Tarasenko , Marcel Apfelbaum , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Laurent Vivier , Aurelien Jarno , qemu-riscv@nongnu.org, Palmer Dabbelt , Yoshinori Sato , Bastian Koppelmann , Bin Meng , Daniel Henrique Barboza , Mark Cave-Ayland , Weiwei Li , Daniel Henrique Barboza , Nicholas Piggin , qemu-arm@nongnu.org, Liu Zhiwei , Marek Vasut , Laurent Vivier , Peter Maydell , Brian Cain , Thomas Huth , Chris Wulff , Sergio Lopez , Richard Henderson , Ilya Leoshkevich , Michael Rolnik Subject: [PATCH v2 14/16] target/mips: Declare CPU QOM types using DEFINE_TYPES() macro Date: Fri, 13 Oct 2023 16:01:13 +0200 Message-ID: <20231013140116.255-15-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231013140116.255-1-philmd@linaro.org> References: <20231013140116.255-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=philmd@linaro.org; helo=mail-ed1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When multiple QOM types are registered in the same file, it is simpler to use the the DEFINE_TYPES() macro. In particular because type array declared with such macro are easier to review. In few commits we are going to add more types, so replace the type_register_static() to ease further reviews. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/mips/cpu.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index a0023edd43..83ee54f766 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -595,17 +595,21 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) #endif /* CONFIG_TCG */ } -static const TypeInfo mips_cpu_type_info = { - .name = TYPE_MIPS_CPU, - .parent = TYPE_CPU, - .instance_size = sizeof(MIPSCPU), - .instance_align = __alignof(MIPSCPU), - .instance_init = mips_cpu_initfn, - .abstract = true, - .class_size = sizeof(MIPSCPUClass), - .class_init = mips_cpu_class_init, +static const TypeInfo mips_cpu_types[] = { + { + .name = TYPE_MIPS_CPU, + .parent = TYPE_CPU, + .instance_size = sizeof(MIPSCPU), + .instance_align = __alignof(MIPSCPU), + .instance_init = mips_cpu_initfn, + .abstract = true, + .class_size = sizeof(MIPSCPUClass), + .class_init = mips_cpu_class_init, + } }; +DEFINE_TYPES(mips_cpu_types) + static void mips_cpu_cpudef_class_init(ObjectClass *oc, void *data) { MIPSCPUClass *mcc = MIPS_CPU_CLASS(oc); @@ -630,7 +634,6 @@ static void mips_cpu_register_types(void) { int i; - type_register_static(&mips_cpu_type_info); for (i = 0; i < mips_defs_number; i++) { mips_register_cpudef_type(&mips_defs[i]); }