Message ID | 20231012121857.31873-4-philmd@linaro.org |
---|---|
State | Superseded |
Headers | show |
Series | hw/pci-host/designware: QOM shuffling (Host bridge <-> Root function) | expand |
On Thu, 12 Oct 2023 at 13:19, Philippe Mathieu-Daudé <philmd@linaro.org> wrote: > > designware_pcie_root_realize() uses get_system_memory() > as the "host side memory region", as opposed to the "PCI > side" one. Introduce the 'host_mem' variable for clarity. > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> > --- Reviewed-by: Peter Maydell <peter.maydell@linaro.org> thanks -- PMM
Hi Phil, On 10/12/23 9:18 AM, Philippe Mathieu-Daudé wrote: > designware_pcie_root_realize() uses get_system_memory() > as the "host side memory region", as opposed to the "PCI > side" one. Introduce the 'host_mem' variable for clarity. > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> > Reviewed-by: Peter Maydell <peter.maydell@linaro.org> > --- > hw/pci-host/designware.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c > index 692e0731cd..bacb2bdb2d 100644 > --- a/hw/pci-host/designware.c > +++ b/hw/pci-host/designware.c > @@ -393,6 +393,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, Error **errp) > { > DesignwarePCIERoot *root = DESIGNWARE_PCIE_ROOT(dev); > DesignwarePCIEHost *host = designware_pcie_root_to_host(root); > + MemoryRegion *host_mem = get_system_memory(); > MemoryRegion *address_space = &host->pci.memory; > PCIBridge *br = PCI_BRIDGE(dev); > DesignwarePCIEViewport *viewport; > @@ -433,7 +434,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, Error **errp) > viewport->cr[0] = DESIGNWARE_PCIE_ATU_TYPE_MEM; > > source = &host->pci.address_space_root; > - destination = get_system_memory(); > + destination = host_mem; > direction = "Inbound"; > > /* > @@ -458,7 +459,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, Error **errp) > > destination = &host->pci.memory; > direction = "Outbound"; > - source = get_system_memory(); > + source = host_mem; > > /* > * Configure MemoryRegion implementing CPU -> PCI memory > Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org> This patch can get merged independently of this series. Cheers, Gustavo
diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index 692e0731cd..bacb2bdb2d 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -393,6 +393,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, Error **errp) { DesignwarePCIERoot *root = DESIGNWARE_PCIE_ROOT(dev); DesignwarePCIEHost *host = designware_pcie_root_to_host(root); + MemoryRegion *host_mem = get_system_memory(); MemoryRegion *address_space = &host->pci.memory; PCIBridge *br = PCI_BRIDGE(dev); DesignwarePCIEViewport *viewport; @@ -433,7 +434,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, Error **errp) viewport->cr[0] = DESIGNWARE_PCIE_ATU_TYPE_MEM; source = &host->pci.address_space_root; - destination = get_system_memory(); + destination = host_mem; direction = "Inbound"; /* @@ -458,7 +459,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, Error **errp) destination = &host->pci.memory; direction = "Outbound"; - source = get_system_memory(); + source = host_mem; /* * Configure MemoryRegion implementing CPU -> PCI memory
designware_pcie_root_realize() uses get_system_memory() as the "host side memory region", as opposed to the "PCI side" one. Introduce the 'host_mem' variable for clarity. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- hw/pci-host/designware.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)