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[176.172.113.148]) by smtp.gmail.com with ESMTPSA id v19-20020a1709064e9300b00988e953a586sm8108187eju.61.2023.10.10.02.29.58 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 10 Oct 2023 02:30:02 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Hildenbrand , "Michael S. Tsirkin" , Song Gao , =?utf-8?q?C=C3=A9dric_Le_Goater?= , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , Laurent Vivier , Bastian Koppelmann , qemu-arm@nongnu.org, Jiaxun Yang , Ilya Leoshkevich , Yoshinori Sato , Paolo Bonzini , Weiwei Li , Nicholas Piggin , qemu-riscv@nongnu.org, "Edgar E. Iglesias" , Bin Meng , Yanan Wang , Palmer Dabbelt , Alistair Francis , Aleksandar Rikalo , Daniel Henrique Barboza , Marek Vasut , Peter Maydell , qemu-ppc@nongnu.org, Michael Rolnik , Max Filippov , Mark Cave-Ayland , Laurent Vivier , Stafford Horne , Thomas Huth , Chris Wulff , Sergio Lopez , Xiaojuan Yang , Richard Henderson , Liu Zhiwei , Artyom Tarasenko , Daniel Henrique Barboza , Eduardo Habkost , Brian Cain , Marcel Apfelbaum , Aurelien Jarno , qemu-s390x@nongnu.org Subject: [PATCH 07/18] target/nios2: Declare QOM definitions in 'cpu-qom.h' Date: Tue, 10 Oct 2023 11:28:49 +0200 Message-ID: <20231010092901.99189-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231010092901.99189-1-philmd@linaro.org> References: <20231010092901.99189-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52e; envelope-from=philmd@linaro.org; helo=mail-ed1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org "target/foo/cpu.h" contains the target specific declarations. A heterogeneous setup need to access target agnostic declarations (at least the QOM ones, to instantiate the objects). Our convention is to add such target agnostic QOM declarations in the "target/foo/cpu-qom.h" header. Extract QOM definitions from "cpu.h" to "cpu-qom.h". Signed-off-by: Philippe Mathieu-Daudé --- target/nios2/cpu-qom.h | 32 ++++++++++++++++++++++++++++++++ target/nios2/cpu.h | 22 +--------------------- 2 files changed, 33 insertions(+), 21 deletions(-) create mode 100644 target/nios2/cpu-qom.h diff --git a/target/nios2/cpu-qom.h b/target/nios2/cpu-qom.h new file mode 100644 index 0000000000..0bcf2c724f --- /dev/null +++ b/target/nios2/cpu-qom.h @@ -0,0 +1,32 @@ +/* + * QEMU Nios II CPU QOM header (target agnostic) + * + * Copyright (c) 2012 Chris Wulff + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#ifndef QEMU_NIOS2_CPU_QOM_H +#define QEMU_NIOS2_CPU_QOM_H + +#include "hw/core/cpu.h" +#include "qom/object.h" + +#define TYPE_NIOS2_CPU "nios2-cpu" + +OBJECT_DECLARE_CPU_TYPE(Nios2CPU, Nios2CPUClass, NIOS2_CPU) + +/** + * Nios2CPUClass: + * @parent_phases: The parent class' reset phase handlers. + * + * A Nios2 CPU model. + */ +struct Nios2CPUClass { + CPUClass parent_class; + + DeviceRealize parent_realize; + ResettablePhases parent_phases; +}; + +#endif diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 70b6377a4f..e19e12b2a6 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -21,35 +21,15 @@ #ifndef NIOS2_CPU_H #define NIOS2_CPU_H +#include "cpu-qom.h" #include "exec/cpu-defs.h" -#include "hw/core/cpu.h" #include "hw/registerfields.h" -#include "qom/object.h" typedef struct CPUArchState CPUNios2State; #if !defined(CONFIG_USER_ONLY) #include "mmu.h" #endif -#define TYPE_NIOS2_CPU "nios2-cpu" - -OBJECT_DECLARE_CPU_TYPE(Nios2CPU, Nios2CPUClass, NIOS2_CPU) - -/** - * Nios2CPUClass: - * @parent_phases: The parent class' reset phase handlers. - * - * A Nios2 CPU model. - */ -struct Nios2CPUClass { - /*< private >*/ - CPUClass parent_class; - /*< public >*/ - - DeviceRealize parent_realize; - ResettablePhases parent_phases; -}; - #define TARGET_HAS_ICE 1 /* Configuration options for Nios II */