From patchwork Tue Oct 10 09:28:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 731440 Delivered-To: patch@linaro.org Received: by 2002:a5d:574c:0:b0:31d:da82:a3b4 with SMTP id q12csp1641522wrw; Tue, 10 Oct 2023 02:32:59 -0700 (PDT) X-Google-Smtp-Source: AGHT+IElpNs7DZ1ygi1m1Uk+6/c22BVgT1s3kWk+uKRZw7PB2TIkoUUegGjmBSKcrezwdXogHiU/ X-Received: by 2002:a05:6214:1907:b0:65b:1ad4:ca7e with SMTP id er7-20020a056214190700b0065b1ad4ca7emr16639999qvb.56.1696930379104; Tue, 10 Oct 2023 02:32:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696930379; cv=none; d=google.com; s=arc-20160816; b=JPByUmw1Dt5W4HQx1S3+fcnfJlbQbZ8LGA467xr/tdiH74TF543YPFVDQL5GmoEH8R QTZRJ8WUGRyH7L0ZjjU9tS4cFzqLtQjuXfsXeH7TiSho0PLi7euifS89AkwCtbY0PdNM Nb6PlTtkhUQ+rmu+zwG0Md+V59VUvbl9SNqFLoKUOnIX2c2GmZMyz+wre69TUs37QzH6 fgjnzM61un4/dVj8zvivTdNVx2Dxphx8YP5QEQvjL+dsIMXtF2NMDMPa4F6BQ0Nby1F3 9oK+sMnYd3pqJLb4iNx1c6z9u8K7ZsC1ZPjXlFlcOp35ieNis6cXyPHEV4RtNbjzvSF7 YSHQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=FCZsPKk2jjgL5uslZNHqLJ2r1o7NzsXUetagm0hbuBc=; fh=iupQBrmerAoZOw8v6swRnyYBx+6KhbF7AbBF1Jawaz4=; b=Y3TwJcxxdS/N95hSP3qwGREj5uRDRDep/0eF60QHZz7RySKXcCDBMh14HhMPE5F6t+ WFl58bvtyX+bhhX7J7FddjJUYRlvL9JYr5L2C4Q+AYu5MaYNmLmr05qiEB6o4LOxNfBu GJbis7ISMeq01tN0SItBi/ALL9Dh3q2K5VqTHIJVChbfOrWdJpES9hCytD5d3DYhSl29 rF85l/LF7QQu0mrEdOasbNbPG4hlwaRY8vGFHYK7tDLscL3KAXNKDclpmChHEpLkiumm SU2ZY2xlmPQCtE3Ir5BXzzM7YS3+3ZcNo3tUL4RI4YhJNAaQxED6jDT4x80/enSGGwcn Reow== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Ilr/f8eY"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id r6-20020a05620a298600b0076cd9307ac1si7329662qkp.548.2023.10.10.02.32.58 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 10 Oct 2023 02:32:59 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Ilr/f8eY"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qq95H-0002Rs-70; Tue, 10 Oct 2023 05:31:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qq94U-0000sd-51 for qemu-devel@nongnu.org; Tue, 10 Oct 2023 05:30:45 -0400 Received: from mail-ed1-x52d.google.com ([2a00:1450:4864:20::52d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qq94O-00084t-3p for qemu-devel@nongnu.org; Tue, 10 Oct 2023 05:30:33 -0400 Received: by mail-ed1-x52d.google.com with SMTP id 4fb4d7f45d1cf-5334d78c5f6so9354775a12.2 for ; Tue, 10 Oct 2023 02:30:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1696930219; x=1697535019; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FCZsPKk2jjgL5uslZNHqLJ2r1o7NzsXUetagm0hbuBc=; b=Ilr/f8eYdXSnsRvSzMA9kNkxqDTVFL8mi9YQlm828cGS+zN00CzZi7R2U6QjbyRS11 Oi7l8dL3yLqqPJfYBci8ABAkziFiY4MV4JsLQCOQ6fRj4QlXBd2Z4jrsaJAz5PYufaNy NaoZyXtgZaPKapbDa5HMPsli+jDnFR6HomqbNo30tNrZ3KJ5owFnAKD0su3OR2KeRJ9D A9BfmvantnBo2+Cuc7+rucVM26wPhTK7CGYXxqPThAg/chsw+28aRQa6WM+A7oT3Hr+1 o6y2VqyYrRKNFfIda0khDxEaJEhzceUu69HlSc58jtmiTRM6gl24jzLGm8fUIL34Hq3x Z5Iw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696930219; x=1697535019; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FCZsPKk2jjgL5uslZNHqLJ2r1o7NzsXUetagm0hbuBc=; b=lNpquJ1L3uc+W+mprBPGzDWMnnqfPqez4PBk1b5eMatpNOPZUa5zcgP6lFg0nQPa46 Ll6BmP+wlG166epsx6SlB3y54INytWBGtXQYSbjE+fkFvqEMIO91ZB03wneOxcKRuh64 9kI3KIgH6s9FlyJ4JnYsxRafQMJC9JzpDgt3B9EXmUpTIQ/jGd20gvCYEQC9GQJqXijT EfAFUDV3I7c5K//VfbB9znLZCnabR9HXKIY6ulGZzyK2pXx63kYyTDgjSsB6BQvkVTes pXPZvAnReaD8kfm3AT890zcfmJMjq/iSxsu8BRE2o+lMjO3A73vLLaX20QtKypiHiXVT f5PQ== X-Gm-Message-State: AOJu0YyDbYZDSjcxzzxy183nQf7fVVREuFdW4jJvp0YBGf5vBWm9okzx YM6W7x/paPQZ3kc8BNzcaTxAD4lblJINlVEmVxBwQg== X-Received: by 2002:a50:ee87:0:b0:514:9ab4:3524 with SMTP id f7-20020a50ee87000000b005149ab43524mr16259823edr.7.1696930219293; Tue, 10 Oct 2023 02:30:19 -0700 (PDT) Received: from m1x-phil.lan (aif79-h01-176-172-113-148.dsl.sta.abo.bbox.fr. [176.172.113.148]) by smtp.gmail.com with ESMTPSA id u25-20020aa7db99000000b0053116e45317sm7298755edt.44.2023.10.10.02.30.15 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 10 Oct 2023 02:30:18 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: David Hildenbrand , "Michael S. Tsirkin" , Song Gao , =?utf-8?q?C=C3=A9dric_Le_Goater?= , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , Laurent Vivier , Bastian Koppelmann , qemu-arm@nongnu.org, Jiaxun Yang , Ilya Leoshkevich , Yoshinori Sato , Paolo Bonzini , Weiwei Li , Nicholas Piggin , qemu-riscv@nongnu.org, "Edgar E. Iglesias" , Bin Meng , Yanan Wang , Palmer Dabbelt , Alistair Francis , Aleksandar Rikalo , Daniel Henrique Barboza , Marek Vasut , Peter Maydell , qemu-ppc@nongnu.org, Michael Rolnik , Max Filippov , Mark Cave-Ayland , Laurent Vivier , Stafford Horne , Thomas Huth , Chris Wulff , Sergio Lopez , Xiaojuan Yang , Richard Henderson , Liu Zhiwei , Artyom Tarasenko , Daniel Henrique Barboza , Eduardo Habkost , Brian Cain , Marcel Apfelbaum , Aurelien Jarno , qemu-s390x@nongnu.org Subject: [PATCH 09/18] target/i386: Inline target specific TARGET_DEFAULT_CPU_TYPE definition Date: Tue, 10 Oct 2023 11:28:51 +0200 Message-ID: <20231010092901.99189-10-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231010092901.99189-1-philmd@linaro.org> References: <20231010092901.99189-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52d; envelope-from=philmd@linaro.org; helo=mail-ed1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org TARGET_DEFAULT_CPU_TYPE depends on the TARGET_X86_64 definition which is target specific. Such target specific definition taint "cpu-qom.h". Since "cpu-qom.h" must be target agnostic, remove this target specific definition uses by inlining TARGET_DEFAULT_CPU_TYPE in the two machines using it. "target/i386/cpu-qom.h" is now fully target agnostic. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/cpu.h | 6 ------ hw/i386/microvm.c | 6 +++++- hw/i386/pc.c | 6 +++++- 3 files changed, 10 insertions(+), 8 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 862e4f1ff5..7c976971c7 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2243,12 +2243,6 @@ uint64_t cpu_get_tsc(CPUX86State *env); #define CPU_RESOLVING_TYPE TYPE_X86_CPU -#ifdef TARGET_X86_64 -#define TARGET_DEFAULT_CPU_TYPE X86_CPU_TYPE_NAME("qemu64") -#else -#define TARGET_DEFAULT_CPU_TYPE X86_CPU_TYPE_NAME("qemu32") -#endif - #define cpu_list x86_cpu_list /* MMU modes definitions */ diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c index b9c93039e2..281bf0c364 100644 --- a/hw/i386/microvm.c +++ b/hw/i386/microvm.c @@ -650,7 +650,11 @@ static void microvm_class_init(ObjectClass *oc, void *data) mc->has_hotpluggable_cpus = false; mc->auto_enable_numa_with_memhp = false; mc->auto_enable_numa_with_memdev = false; - mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE; +#ifdef TARGET_X86_64 + mc->default_cpu_type = X86_CPU_TYPE_NAME("qemu64"); +#else + mc->default_cpu_type = X86_CPU_TYPE_NAME("qemu32"); +#endif mc->nvdimm_supported = false; mc->default_ram_id = "microvm.ram"; diff --git a/hw/i386/pc.c b/hw/i386/pc.c index aad7e8ccd1..2f7c0c1bdb 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1818,7 +1818,11 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) hc->plug = pc_machine_device_plug_cb; hc->unplug_request = pc_machine_device_unplug_request_cb; hc->unplug = pc_machine_device_unplug_cb; - mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE; +#ifdef TARGET_X86_64 + mc->default_cpu_type = X86_CPU_TYPE_NAME("qemu64"); +#else + mc->default_cpu_type = X86_CPU_TYPE_NAME("qemu32"); +#endif mc->nvdimm_supported = true; mc->smp_props.dies_supported = true; mc->default_ram_id = "pc.ram";