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[176.171.209.234]) by smtp.gmail.com with ESMTPSA id mf13-20020a170906cb8d00b0099caf5bed64sm2735321ejb.57.2023.09.15.12.00.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 15 Sep 2023 12:00:44 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Fabiano Rosas , Marcelo Tosatti , Claudio Fontana , Eduardo Habkost , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , kvm@vger.kernel.org, Yanan Wang , Paolo Bonzini , Marcel Apfelbaum Subject: [PATCH 5/5] accel/tcg: Restrict tcg_exec_[un]realizefn() to TCG Date: Fri, 15 Sep 2023 21:00:08 +0200 Message-ID: <20230915190009.68404-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230915190009.68404-1-philmd@linaro.org> References: <20230915190009.68404-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62a; envelope-from=philmd@linaro.org; helo=mail-ej1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We don't need to expose these TCG-specific methods to the whole code base. Register them as AccelClass handlers, they will be called by the generic accel_cpu_[un]realize() methods. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Claudio Fontana --- accel/tcg/internal.h | 3 +++ include/exec/cpu-all.h | 2 -- accel/tcg/tcg-all.c | 2 ++ cpu.c | 8 -------- 4 files changed, 5 insertions(+), 10 deletions(-) diff --git a/accel/tcg/internal.h b/accel/tcg/internal.h index e8cbbde581..57ab397df1 100644 --- a/accel/tcg/internal.h +++ b/accel/tcg/internal.h @@ -80,6 +80,9 @@ bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc); void cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb, uintptr_t host_pc); +bool tcg_exec_realizefn(CPUState *cpu, Error **errp); +void tcg_exec_unrealizefn(CPUState *cpu); + /* Return the current PC from CPU, which may be cached in TB. */ static inline vaddr log_pc(CPUState *cpu, const TranslationBlock *tb) { diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 1e5c530ee1..230525ebf7 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -422,8 +422,6 @@ void dump_exec_info(GString *buf); /* accel/tcg/cpu-exec.c */ int cpu_exec(CPUState *cpu); -bool tcg_exec_realizefn(CPUState *cpu, Error **errp); -void tcg_exec_unrealizefn(CPUState *cpu); /** * cpu_set_cpustate_pointers(cpu) diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index 03dfd67e9e..6942a9766a 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -227,6 +227,8 @@ static void tcg_accel_class_init(ObjectClass *oc, void *data) AccelClass *ac = ACCEL_CLASS(oc); ac->name = "tcg"; ac->init_machine = tcg_init_machine; + ac->realize_cpu = tcg_exec_realizefn; + ac->unrealize_cpu = tcg_exec_unrealizefn; ac->allowed = &tcg_allowed; ac->gdbstub_supported_sstep_flags = tcg_gdbstub_supported_sstep_flags; diff --git a/cpu.c b/cpu.c index b928bbed50..1a8e730bed 100644 --- a/cpu.c +++ b/cpu.c @@ -140,11 +140,6 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) return; } - /* NB: errp parameter is unused currently */ - if (tcg_enabled()) { - tcg_exec_realizefn(cpu, errp); - } - /* Wait until cpu initialization complete before exposing cpu. */ cpu_list_add(cpu); @@ -190,9 +185,6 @@ void cpu_exec_unrealizefn(CPUState *cpu) * accel_cpu_unrealize, which may free fields using call_rcu. */ accel_cpu_unrealize(cpu); - if (tcg_enabled()) { - tcg_exec_unrealizefn(cpu); - } } /*