diff mbox series

[v2,22/24] accel/tcg: Remove env_tlb()

Message ID 20230914024435.1381329-23-richard.henderson@linaro.org
State Superseded
Headers show
Series Reduce usage of CPUArchState in cputlb.c | expand

Commit Message

Richard Henderson Sept. 14, 2023, 2:44 a.m. UTC
From: Anton Johansson <anjo@rev.ng>

The function is no longer used to access the TLB,
and has been replaced by cpu->neg.tlb.

Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230912153428.17816-9-anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[rth: Merge comment update patch]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/exec/cpu-all.h       | 11 -----------
 tcg/aarch64/tcg-target.c.inc |  2 +-
 tcg/arm/tcg-target.c.inc     |  2 +-
 3 files changed, 2 insertions(+), 13 deletions(-)

Comments

Philippe Mathieu-Daudé Sept. 14, 2023, 3:44 p.m. UTC | #1
On 14/9/23 04:44, Richard Henderson wrote:
> From: Anton Johansson <anjo@rev.ng>
> 
> The function is no longer used to access the TLB,
> and has been replaced by cpu->neg.tlb.
> 
> Signed-off-by: Anton Johansson <anjo@rev.ng>
> Message-Id: <20230912153428.17816-9-anjo@rev.ng>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> [rth: Merge comment update patch]
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   include/exec/cpu-all.h       | 11 -----------
>   tcg/aarch64/tcg-target.c.inc |  2 +-
>   tcg/arm/tcg-target.c.inc     |  2 +-
>   3 files changed, 2 insertions(+), 13 deletions(-)

Missing:

-- >8 --
diff --cc accel/tcg/cputlb.c
index bb7dcb87af,08df68f03a..0000000000
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@@ -1746,7 -1734,7 +1734,7 @@@ bool tlb_plugin_lookup(CPUState *cpu, v
           /* We must have an iotlb entry for MMIO */
           if (tlb_addr & TLB_MMIO) {
               CPUTLBEntryFull *full;
-             full = &env_tlb(env)->d[mmu_idx].fulltlb[index];
++            full = &cpu->neg.tlb.d[mmu_idx].fulltlb[index];
               data->is_io = true;
               data->v.io.section =
                   iotlb_to_section(cpu, full->xlat_section, full->attrs);
---

(Noticed using --enable-plugins).
Xingtao Yao (Fujitsu)" via Sept. 14, 2023, 4:24 p.m. UTC | #2
On 9/14/23 17:44, Philippe Mathieu-Daudé wrote:
> On 14/9/23 04:44, Richard Henderson wrote:
>> From: Anton Johansson <anjo@rev.ng>
>>
>> The function is no longer used to access the TLB,
>> and has been replaced by cpu->neg.tlb.
>>
>> Signed-off-by: Anton Johansson <anjo@rev.ng>
>> Message-Id: <20230912153428.17816-9-anjo@rev.ng>
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>> [rth: Merge comment update patch]
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>>   include/exec/cpu-all.h       | 11 -----------
>>   tcg/aarch64/tcg-target.c.inc |  2 +-
>>   tcg/arm/tcg-target.c.inc     |  2 +-
>>   3 files changed, 2 insertions(+), 13 deletions(-)
>
> Missing:
>
> -- >8 --
> diff --cc accel/tcg/cputlb.c
> index bb7dcb87af,08df68f03a..0000000000
> --- a/accel/tcg/cputlb.c
> +++ b/accel/tcg/cputlb.c
> @@@ -1746,7 -1734,7 +1734,7 @@@ bool tlb_plugin_lookup(CPUState *cpu, v
>           /* We must have an iotlb entry for MMIO */
>           if (tlb_addr & TLB_MMIO) {
>               CPUTLBEntryFull *full;
> -             full = &env_tlb(env)->d[mmu_idx].fulltlb[index];
> ++            full = &cpu->neg.tlb.d[mmu_idx].fulltlb[index];
>               data->is_io = true;
>               data->v.io.section =
>                   iotlb_to_section(cpu, full->xlat_section, full->attrs);
> ---
>
> (Noticed using --enable-plugins).
Ah right, I'll make sure to test with plugins in the future! Thanks:)
diff mbox series

Patch

diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index af9516654a..b37715c27d 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -451,15 +451,4 @@  static inline CPUState *env_cpu(CPUArchState *env)
     return (void *)env - sizeof(CPUState);
 }
 
-/**
- * env_tlb(env)
- * @env: The architecture environment
- *
- * Return the CPUTLB state associated with the environment.
- */
-static inline CPUTLB *env_tlb(CPUArchState *env)
-{
-    return &env_cpu(env)->neg.tlb;
-}
-
 #endif /* CPU_ALL_H */
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index 0931a69448..0db4c907e3 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -1676,7 +1676,7 @@  static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
     mask_type = (s->page_bits + s->tlb_dyn_max_bits > 32
                  ? TCG_TYPE_I64 : TCG_TYPE_I32);
 
-    /* Load env_tlb(env)->f[mmu_idx].{mask,table} into {tmp0,tmp1}. */
+    /* Load cpu->neg.tlb.f[mmu_idx].{mask,table} into {tmp0,tmp1}. */
     QEMU_BUILD_BUG_ON(offsetof(CPUTLBDescFast, mask) != 0);
     QEMU_BUILD_BUG_ON(offsetof(CPUTLBDescFast, table) != 8);
     tcg_out_insn(s, 3314, LDP, TCG_REG_TMP0, TCG_REG_TMP1, TCG_AREG0,
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index acb5f23b54..75978018c9 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -1420,7 +1420,7 @@  static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
     ldst->addrlo_reg = addrlo;
     ldst->addrhi_reg = addrhi;
 
-    /* Load env_tlb(env)->f[mmu_idx].{mask,table} into {r0,r1}.  */
+    /* Load cpu->neg.tlb.f[mmu_idx].{mask,table} into {r0,r1}.  */
     QEMU_BUILD_BUG_ON(offsetof(CPUTLBDescFast, mask) != 0);
     QEMU_BUILD_BUG_ON(offsetof(CPUTLBDescFast, table) != 4);
     tcg_out_ldrd_8(s, COND_AL, TCG_REG_R0, TCG_AREG0, fast_off);