| Message ID | 20230811214031.171020-5-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target/arm: Implement cortex-a710 | expand |
On Fri, 11 Aug 2023 at 22:41, Richard Henderson <richard.henderson@linaro.org> wrote: > > When the cpu support MTE, but the system does not, reduce cpu > support to user instructions at EL0 instead of completely > disabling MTE. If we encounter a cpu implementation which does > something else, we can revisit this setting. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > -- Reviewed-by: Peter Maydell <peter.maydell@linaro.org> thanks -- PMM
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 37e8c35677..85c02308e4 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2067,12 +2067,13 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) #ifndef CONFIG_USER_ONLY /* - * Disable the MTE feature bits if we do not have tag-memory - * provided by the machine. + * If we do not have tag-memory provided by the machine, + * reduce MTE support to instructions enabled at EL0. + * This matches Cortex-A710 BROADCASTMTE input being LOW. */ if (cpu->tag_memory == NULL) { cpu->isar.id_aa64pfr1 = - FIELD_DP64(cpu->isar.id_aa64pfr1, ID_AA64PFR1, MTE, 0); + FIELD_DP64(cpu->isar.id_aa64pfr1, ID_AA64PFR1, MTE, 1); } #endif }
When the cpu support MTE, but the system does not, reduce cpu support to user instructions at EL0 instead of completely disabling MTE. If we encounter a cpu implementation which does something else, we can revisit this setting. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/cpu.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)