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[PULL,04/11] accel/tcg: Assert one page in tb_invalidate_phys_page_range__locked

Message ID 20230701065510.514743-5-richard.henderson@linaro.org
State Accepted
Commit e665cf72fe6357945fdbecf747dac58c0c7c7c66
Headers show
Series [PULL,01/11] ui/dbus: fix build errors in dbus_update_gl_cb and dbus_call_update_gl | expand

Commit Message

Richard Henderson July 1, 2023, 6:55 a.m. UTC
From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

Ensure that that both the start and last addresses are within
the same guest page.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230629082522.606219-3-mark.cave-ayland@ilande.co.uk>
[rth: Use tcg_debug_assert, simplify the expression]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 accel/tcg/tb-maint.c | 3 +++
 1 file changed, 3 insertions(+)
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Patch

diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index 33ea1aadd1..9566224d18 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -1092,6 +1092,9 @@  tb_invalidate_phys_page_range__locked(struct page_collection *pages,
     TranslationBlock *current_tb = retaddr ? tcg_tb_lookup(retaddr) : NULL;
 #endif /* TARGET_HAS_PRECISE_SMC */
 
+    /* Range may not cross a page. */
+    tcg_debug_assert(((start ^ last) & TARGET_PAGE_MASK) == 0);
+
     /*
      * We remove all the TBs in the range [start, last].
      * XXX: see if in some cases it could be faster to invalidate all the code