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Replace !CONFIG_SOFTMMU negation by the positive form which is clearer when reviewing code. Change mostly done mechanically using: $ sed -i -e 's/!defined(CONFIG_SOFTMMU)/defined(CONFIG_USER_ONLY)/' \ -e 's/ifndef CONFIG_SOFTMMU/ifdef CONFIG_USER_ONLY/' \ $(git grep -l CONFIG_SOFTMMU) and adapting comments manually. Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/cpu-exec.c | 4 ++-- target/i386/helper.c | 6 +++--- tcg/aarch64/tcg-target.c.inc | 4 ++-- tcg/arm/tcg-target.c.inc | 4 ++-- tcg/i386/tcg-target.c.inc | 8 ++++---- tcg/loongarch64/tcg-target.c.inc | 4 ++-- tcg/mips/tcg-target.c.inc | 6 +++--- tcg/ppc/tcg-target.c.inc | 4 ++-- tcg/riscv/tcg-target.c.inc | 2 +- tcg/s390x/tcg-target.c.inc | 4 ++-- tcg/sparc64/tcg-target.c.inc | 4 ++-- 11 files changed, 25 insertions(+), 25 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index f1eae7b8e5..d5695a7083 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -568,7 +568,7 @@ void cpu_exec_step_atomic(CPUState *cpu) cpu_tb_exec(cpu, tb, &tb_exit); cpu_exec_exit(cpu); } else { -#ifndef CONFIG_SOFTMMU +#ifdef CONFIG_USER_ONLY clear_helper_retaddr(); if (have_mmap_lock()) { mmap_unlock(); @@ -1025,7 +1025,7 @@ static int cpu_exec_setjmp(CPUState *cpu, SyncClocks *sc) /* Non-buggy compilers preserve this; assert the correct value. */ g_assert(cpu == current_cpu); -#ifndef CONFIG_SOFTMMU +#ifdef CONFIG_USER_ONLY clear_helper_retaddr(); if (have_mmap_lock()) { mmap_unlock(); diff --git a/target/i386/helper.c b/target/i386/helper.c index 89aa696c6d..c9755b3aba 100644 --- a/target/i386/helper.c +++ b/target/i386/helper.c @@ -582,7 +582,7 @@ int cpu_x86_get_descr_debug(CPUX86State *env, unsigned int selector, void do_cpu_init(X86CPU *cpu) { -#if !defined(CONFIG_USER_ONLY) +#if defined(CONFIG_SOFTMMU) CPUState *cs = CPU(cpu); CPUX86State *env = &cpu->env; CPUX86State *save = g_new(CPUX86State, 1); @@ -601,10 +601,10 @@ void do_cpu_init(X86CPU *cpu) kvm_arch_do_init_vcpu(cpu); } apic_init_reset(cpu->apic_state); -#endif /* CONFIG_USER_ONLY */ +#endif /* CONFIG_SOFTMMU */ } -#ifndef CONFIG_USER_ONLY +#ifdef CONFIG_SOFTMMU void do_cpu_sipi(X86CPU *cpu) { diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 35ca80cd56..d82654ac64 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -77,7 +77,7 @@ static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot) #define TCG_REG_TMP2 TCG_REG_X30 #define TCG_VEC_TMP0 TCG_REG_V31 -#ifndef CONFIG_SOFTMMU +#ifdef CONFIG_USER_ONLY #define TCG_REG_GUEST_BASE TCG_REG_X28 #endif @@ -3083,7 +3083,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) tcg_set_frame(s, TCG_REG_SP, TCG_STATIC_CALL_ARGS_SIZE, CPU_TEMP_BUF_NLONGS * sizeof(long)); -#if !defined(CONFIG_SOFTMMU) +#if defined(CONFIG_USER_ONLY) /* * Note that XZR cannot be encoded in the address base register slot, * as that actaully encodes SP. Depending on the guest, we may need diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index 83e286088f..9248c1eb2a 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -89,7 +89,7 @@ static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot) #define TCG_REG_TMP TCG_REG_R12 #define TCG_VEC_TMP TCG_REG_Q15 -#ifndef CONFIG_SOFTMMU +#ifdef CONFIG_USER_ONLY #define TCG_REG_GUEST_BASE TCG_REG_R11 #endif @@ -2920,7 +2920,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]); -#ifndef CONFIG_SOFTMMU +#ifdef CONFIG_USER_ONLY if (guest_base) { tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_GUEST_BASE, guest_base); tcg_regset_set_reg(s->reserved_regs, TCG_REG_GUEST_BASE); diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index ab997b5fb3..fa3ef70417 100644 --- a/tcg/i386/tcg-target.c.inc +++ b/tcg/i386/tcg-target.c.inc @@ -1866,7 +1866,7 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) return true; } -#ifndef CONFIG_SOFTMMU +#ifdef CONFIG_USER_ONLY static HostAddress x86_guest_base = { .index = -1 }; @@ -1898,7 +1898,7 @@ static inline int setup_guest_base_seg(void) return 0; } #endif /* setup_guest_base_seg */ -#endif /* !SOFTMMU */ +#endif /* CONFIG_USER_ONLY */ #define MIN_TLB_MASK_TABLE_OFS INT_MIN @@ -4069,7 +4069,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) (ARRAY_SIZE(tcg_target_callee_save_regs) + 2) * 4 + stack_addend); #else -# if !defined(CONFIG_SOFTMMU) +# if defined(CONFIG_USER_ONLY) if (guest_base) { int seg = setup_guest_base_seg(); if (seg != 0) { @@ -4083,7 +4083,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) tcg_regset_set_reg(s->reserved_regs, x86_guest_base.index); } } -# endif +# endif /* CONFIG_USER_ONLY */ tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]); tcg_out_addi(s, TCG_REG_ESP, -stack_addend); /* jmp *tb. */ diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index baf5fc3819..e145975aaf 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -122,7 +122,7 @@ static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot) return TCG_REG_A0 + slot; } -#ifndef CONFIG_SOFTMMU +#ifdef CONFIG_USER_ONLY #define USE_GUEST_BASE (guest_base != 0) #define TCG_GUEST_BASE_REG TCG_REG_S1 #endif @@ -1672,7 +1672,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) TCG_REG_SP, SAVE_OFS + i * REG_SIZE); } -#if !defined(CONFIG_SOFTMMU) +#if defined(CONFIG_USER_ONLY) if (USE_GUEST_BASE) { tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base); tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc index 9faa8bdf0b..1380b905dd 100644 --- a/tcg/mips/tcg-target.c.inc +++ b/tcg/mips/tcg-target.c.inc @@ -78,7 +78,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { #define TCG_TMP2 TCG_REG_T8 #define TCG_TMP3 TCG_REG_T7 -#ifndef CONFIG_SOFTMMU +#ifdef CONFIG_USER_ONLY #define TCG_GUEST_BASE_REG TCG_REG_S7 #endif #if TCG_TARGET_REG_BITS == 64 @@ -2465,7 +2465,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) TCG_REG_SP, SAVE_OFS + i * REG_SIZE); } -#ifndef CONFIG_SOFTMMU +#ifdef CONFIG_USER_ONLY if (guest_base != (int16_t)guest_base) { /* * The function call abi for n32 and n64 will have loaded $25 (t9) @@ -2479,7 +2479,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) TCG_TARGET_REG_BITS == 64 ? TCG_REG_T9 : 0); tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); } -#endif +#endif /* CONFIG_USER_ONLY */ if (TCG_TARGET_REG_BITS == 64) { tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_TB, tcg_target_call_iarg_regs[1]); diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 507fe6cda8..41420f7e6f 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -97,7 +97,7 @@ static bool have_isel; bool have_altivec; bool have_vsx; -#ifndef CONFIG_SOFTMMU +#ifdef CONFIG_USER_ONLY #define TCG_GUEST_BASE_REG 30 #endif @@ -2449,7 +2449,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) } tcg_out_st(s, TCG_TYPE_PTR, TCG_REG_R0, TCG_REG_R1, FRAME_SIZE+LR_OFFSET); -#ifndef CONFIG_SOFTMMU +#ifdef CONFIG_USER_ONLY if (guest_base) { tcg_out_movi_int(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base, true); tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index eeaeb6b6e3..60642f3e9a 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -2030,7 +2030,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) TCG_REG_SP, SAVE_OFS + i * REG_SIZE); } -#if !defined(CONFIG_SOFTMMU) +#if defined(CONFIG_USER_ONLY) tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base); tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); #endif diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index a878acd8ca..2a948e5317 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -46,7 +46,7 @@ /* A scratch register that may be be used throughout the backend. */ #define TCG_TMP0 TCG_REG_R1 -#ifndef CONFIG_SOFTMMU +#ifdef CONFIG_USER_ONLY #define TCG_GUEST_BASE_REG TCG_REG_R13 #endif @@ -3427,7 +3427,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) TCG_STATIC_CALL_ARGS_SIZE + TCG_TARGET_CALL_STACK_OFFSET, CPU_TEMP_BUF_NLONGS * sizeof(long)); -#ifndef CONFIG_SOFTMMU +#ifdef CONFIG_USER_ONLY if (guest_base >= 0x80000) { tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base); tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc index ffcb879211..29e67758ef 100644 --- a/tcg/sparc64/tcg-target.c.inc +++ b/tcg/sparc64/tcg-target.c.inc @@ -78,7 +78,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { #define TCG_REG_T2 TCG_REG_G2 #define TCG_REG_T3 TCG_REG_O7 -#ifndef CONFIG_SOFTMMU +#ifdef CONFIG_USER_ONLY # define TCG_GUEST_BASE_REG TCG_REG_I5 #endif @@ -932,7 +932,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) tcg_out32(s, SAVE | INSN_RD(TCG_REG_O6) | INSN_RS1(TCG_REG_O6) | INSN_IMM13(-frame_size)); -#ifndef CONFIG_SOFTMMU +#ifdef CONFIG_USER_ONLY if (guest_base != 0) { tcg_out_movi_int(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, guest_base, true, TCG_REG_T1);