Message ID | 20230522153144.30610-11-philmd@linaro.org |
---|---|
State | Superseded |
Headers | show
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Mon, 22 May 2023 08:32:43 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org> To: qemu-devel@nongnu.org Cc: Paolo Bonzini <pbonzini@redhat.com>, qemu-arm@nongnu.org, =?utf-8?q?Alex?= =?utf-8?q?_Benn=C3=A9e?= <alex.bennee@linaro.org>, Evgeny Iakovlev <eiakovlev@linux.microsoft.com>, =?utf-8?q?Marc-Andr=C3=A9_?= =?utf-8?q?Lureau?= <marcandre.lureau@redhat.com>, Peter Maydell <peter.maydell@linaro.org>, =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= <philmd@linaro.org> Subject: [PATCH 10/12] hw/char/pl011: Check if receiver is enabled Date: Mon, 22 May 2023 17:31:42 +0200 Message-Id: <20230522153144.30610-11-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230522153144.30610-1-philmd@linaro.org> References: <20230522153144.30610-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org |
Series |
hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop
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expand
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Philippe Mathieu-Daudé <philmd@linaro.org> writes: > Do not receive characters when UART or receiver are disabled. > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 30bedeac15..1ec102d8de 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -77,6 +77,7 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr) #define LCR_BRK (1 << 0) /* Control Register, UARTCR */ +#define CR_RXE (1 << 9) #define CR_TXE (1 << 8) #define CR_UARTEN (1 << 0) @@ -348,9 +349,11 @@ static void pl011_write(void *opaque, hwaddr offset, static int pl011_can_receive(void *opaque) { PL011State *s = (PL011State *)opaque; - int r; + int r = 0; - r = s->read_count < pl011_get_fifo_depth(s); + if (s->cr & (CR_UARTEN | CR_RXE)) { + r = s->read_count < pl011_get_fifo_depth(s); + } trace_pl011_can_receive(s->lcr, s->read_count, r); return r; }
Do not receive characters when UART or receiver are disabled. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- hw/char/pl011.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)