| Message ID | 20230503070656.1746170-49-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | tcg: Improve atomicity support | expand |
On Wed, 3 May 2023 at 08:13, Richard Henderson <richard.henderson@linaro.org> wrote: > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > tcg/ppc/tcg-target.c.inc | 17 ++++++++++++++++- > 1 file changed, 16 insertions(+), 1 deletion(-) > > diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc > index f0a4118bbb..60375804cd 100644 > --- a/tcg/ppc/tcg-target.c.inc > +++ b/tcg/ppc/tcg-target.c.inc > @@ -2034,7 +2034,22 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h, > { > TCGLabelQemuLdst *ldst = NULL; > MemOp opc = get_memop(oi); > - unsigned a_bits = get_alignment_bits(opc); > + MemOp a_bits, atom_a, atom_u; > + > + /* > + * Book II, Section 1.4, Single-Copy Atomicity, specifies: > + * > + * Before 3.0, "An access that is not atomic is performed as a set of > + * smaller disjoint atomic accesses. In general, the number and alignment > + * of these accesses are implementation-dependent." Thus MO_ATOM_IFALIGN. > + * > + * As of 3.0, "the non-atomic access is performed as described in > + * the corresponding list", which matches MO_ATOM_SUBALIGN. > + */ > + a_bits = atom_and_align_for_opc(s, &atom_a, &atom_u, opc, > + have_isa_3_00 ? MO_ATOM_SUBALIGN > + : MO_ATOM_IFALIGN, > + false); > Why doesn't this patch have changes to a HostAddress struct like all the other archs ? -- PMM
On 5/5/23 14:18, Peter Maydell wrote: > On Wed, 3 May 2023 at 08:13, Richard Henderson > <richard.henderson@linaro.org> wrote: >> >> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> >> --- >> tcg/ppc/tcg-target.c.inc | 17 ++++++++++++++++- >> 1 file changed, 16 insertions(+), 1 deletion(-) >> >> diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc >> index f0a4118bbb..60375804cd 100644 >> --- a/tcg/ppc/tcg-target.c.inc >> +++ b/tcg/ppc/tcg-target.c.inc >> @@ -2034,7 +2034,22 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h, >> { >> TCGLabelQemuLdst *ldst = NULL; >> MemOp opc = get_memop(oi); >> - unsigned a_bits = get_alignment_bits(opc); >> + MemOp a_bits, atom_a, atom_u; >> + >> + /* >> + * Book II, Section 1.4, Single-Copy Atomicity, specifies: >> + * >> + * Before 3.0, "An access that is not atomic is performed as a set of >> + * smaller disjoint atomic accesses. In general, the number and alignment >> + * of these accesses are implementation-dependent." Thus MO_ATOM_IFALIGN. >> + * >> + * As of 3.0, "the non-atomic access is performed as described in >> + * the corresponding list", which matches MO_ATOM_SUBALIGN. >> + */ >> + a_bits = atom_and_align_for_opc(s, &atom_a, &atom_u, opc, >> + have_isa_3_00 ? MO_ATOM_SUBALIGN >> + : MO_ATOM_IFALIGN, >> + false); >> > > Why doesn't this patch have changes to a HostAddress struct > like all the other archs ? Because the alignment as only required here, within prepare_host_addr. The Power LQ instruction allows unaligned input, unlike x86 VMOVDQA. r~
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index f0a4118bbb..60375804cd 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -2034,7 +2034,22 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h, { TCGLabelQemuLdst *ldst = NULL; MemOp opc = get_memop(oi); - unsigned a_bits = get_alignment_bits(opc); + MemOp a_bits, atom_a, atom_u; + + /* + * Book II, Section 1.4, Single-Copy Atomicity, specifies: + * + * Before 3.0, "An access that is not atomic is performed as a set of + * smaller disjoint atomic accesses. In general, the number and alignment + * of these accesses are implementation-dependent." Thus MO_ATOM_IFALIGN. + * + * As of 3.0, "the non-atomic access is performed as described in + * the corresponding list", which matches MO_ATOM_SUBALIGN. + */ + a_bits = atom_and_align_for_opc(s, &atom_a, &atom_u, opc, + have_isa_3_00 ? MO_ATOM_SUBALIGN + : MO_ATOM_IFALIGN, + false); #ifdef CONFIG_SOFTMMU int mem_index = get_mmuidx(oi);
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- tcg/ppc/tcg-target.c.inc | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-)