From patchwork Tue Apr 25 19:31:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 676859 Delivered-To: patch@linaro.org Received: by 2002:a5d:4a41:0:0:0:0:0 with SMTP id v1csp2883182wrs; Tue, 25 Apr 2023 12:50:21 -0700 (PDT) X-Google-Smtp-Source: AKy350aJYU6sw8pkMaFVYdhDfSXRPw1LJSQ5NdAOZStyXn3h0vFaSO3EgQBTgUVreobe7JI8qNqf X-Received: by 2002:ac8:5892:0:b0:3e3:9117:66e8 with SMTP id t18-20020ac85892000000b003e3911766e8mr31812913qta.35.1682452221568; Tue, 25 Apr 2023 12:50:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682452221; cv=none; d=google.com; s=arc-20160816; b=GEJbIiu0m18vuaaRtm5OQCFE3/LYmzzhly7NyYelMInyNU6JyE6R595M5V1yfPntVf Y0nd0VtM/3nU/Ht5VU7KYY8hEd7QDzQUrmlBVniUCE3bsbfUzbB6IWlmSFRKuqiPzl3+ fpZRHpeeVZ7jZi4Pqqj5dE3lQht/d1YRqJ7io4QUEv/3bMkr8vZHQ7APOjRqrMuu7ZVf +G5eagITEjwjcaDf7ctTJ20kfEI6R/VXpek5hw0E5siUuAvxQvnIBV47DZI8ycUb7OBP P6z5DCQUpM8xU3mK7I1/awKN5B++FRtXxWZQbSc1j4Sy6tLyOgtPTdx0l+irdgQh6Rq0 yC2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=RsDonkABHa22YkU168z0UM28Gx8szOriNnOnZlCHhck=; b=JrjUSlhjvYJVuBV4sNffdw8/YXqQZ+jb0unwG58LW//nLuLXaNvMtAA0vmPD86kXj4 p51KdGBP9qqfHlCOJFxXWY4euhPno1utO3AgaVLipf/mzD3n5chqJcha9bHmo0RAB5k3 P+R3eoSqoGFcSjtMOnsZGRVvcs2RNB6J2IJdPMy8LoaEIYj7lp9pArotrFaPMw9P1n73 XPk9m7DgmqFCLdWaC/j/uIAvkemHFMUt8AjSO0sj0IBsbFfPnpymLybIRuMLE923fvmh oMXdmQG1lhOgoW/v0JucUqKvrGJofwmwAeyb0qE5wNzZsOZlFTEy1/xO1lXUu45c2CiM BbvA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ovwdcRwZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id x62-20020a376341000000b0074dfd94ea83si8818385qkb.742.2023.04.25.12.50.21 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 25 Apr 2023 12:50:21 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ovwdcRwZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1prOQT-0002t8-RX; Tue, 25 Apr 2023 15:34:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1prOQR-0002db-Fh for qemu-devel@nongnu.org; Tue, 25 Apr 2023 15:34:07 -0400 Received: from mail-lj1-x230.google.com ([2a00:1450:4864:20::230]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1prOQI-0004cN-K1 for qemu-devel@nongnu.org; Tue, 25 Apr 2023 15:34:07 -0400 Received: by mail-lj1-x230.google.com with SMTP id 38308e7fff4ca-2a8b62cfaceso60836921fa.2 for ; Tue, 25 Apr 2023 12:33:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1682451238; x=1685043238; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RsDonkABHa22YkU168z0UM28Gx8szOriNnOnZlCHhck=; b=ovwdcRwZx1Ntatwqq1g9zv7Dq5jaUZGb1mHamz3ogTkhfdx+Ifdpg0GS6syBlPRxcO 89mKbmvgzh/fXnyoNydoPS+tJrxhnosOyTm91NO743E7pTn42YN/W6Z0BWmyIktiXZ0v 8+hb+44XF5ULIZ5rhIxDOPvzG4rSCGOq9JCjr+mGUQZ2VwtWNDXBt4WJOhvS8u6vaYWU qXwVIfZ6lUcxzGi96qAgRh0vocyB/eT1cDjTqiSXmZgJl4/a+1qb9m5dobPXrEfWR8LE mPVa6ulggpvUPWgKubwcJxTr/I795O3VsRNkUGZCTxuIp37vqDzVdapxM7OljTrAgzfH y/bQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1682451238; x=1685043238; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RsDonkABHa22YkU168z0UM28Gx8szOriNnOnZlCHhck=; b=Q4njrSsjN7+F2SU6wRB3Tfx/wEyFsfFcjdjcRl6aEtqktUaY5aq/AetMJW2K769K58 bdOZCtuvd/gmi/RBfa6FSy+WaqbNf4MfU9yAFHKLotcR/mvFkDCN4EO1tR5sYxrl5OXx r7fdbJ/WeWQ5lg5miFR4Y6DHN/TUVbeKWNCO+W7Gg59Id9f7JbtB0co8C3pKNwDWCglx yAAWhR5jKvk9buBLXisz8ZCR+/g5WnSa3GvG9CokE8cHg1sDvz7vykFTchONK64x2TA+ 4OIITAFFPjbnoxIPYq1p9BGJEXzjy8daJTpINwakWwfgDtMxmw0ERbcrwZ8S+GM9gPPv ePrA== X-Gm-Message-State: AAQBX9dAuSNjd6uHnzXL98wi0A7N76hdb35+pEP2f/W5Z+4+8pPEetNS HiS1xM5+ZmT9jnaV5gs7DUzbdqw236HjPhF4mSlGOA== X-Received: by 2002:a2e:87ce:0:b0:2a7:9690:ca01 with SMTP id v14-20020a2e87ce000000b002a79690ca01mr3866113ljj.18.1682451237797; Tue, 25 Apr 2023 12:33:57 -0700 (PDT) Received: from stoup.. ([91.209.212.61]) by smtp.gmail.com with ESMTPSA id z23-20020a2e8857000000b002a8c271de33sm2160484ljj.67.2023.04.25.12.33.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Apr 2023 12:33:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, git@xen0n.name, jiaxun.yang@flygoat.com, philmd@linaro.org Subject: [PATCH v3 15/57] accel/tcg: Use have_atomic16 in ldst_atomicity.c.inc Date: Tue, 25 Apr 2023 20:31:04 +0100 Message-Id: <20230425193146.2106111-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230425193146.2106111-1-richard.henderson@linaro.org> References: <20230425193146.2106111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::230; envelope-from=richard.henderson@linaro.org; helo=mail-lj1-x230.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Hosts using Intel and AMD AVX cpus are quite common. Add fast paths through ldst_atomicity using this. Signed-off-by: Richard Henderson --- accel/tcg/ldst_atomicity.c.inc | 76 +++++++++++++++++++++++++++------- 1 file changed, 60 insertions(+), 16 deletions(-) diff --git a/accel/tcg/ldst_atomicity.c.inc b/accel/tcg/ldst_atomicity.c.inc index c43f101ebe..874fde6937 100644 --- a/accel/tcg/ldst_atomicity.c.inc +++ b/accel/tcg/ldst_atomicity.c.inc @@ -35,6 +35,14 @@ #if defined(CONFIG_ATOMIC128) # define HAVE_al16_fast true +#elif defined(CONFIG_TCG_INTERPRETER) +/* + * FIXME: host specific detection for this is in tcg/$host/, + * but we're using tcg/tci/ instead. + */ +# define HAVE_al16_fast false +#elif defined(__x86_64__) +# define HAVE_al16_fast likely(have_atomic16) #else # define HAVE_al16_fast false #endif @@ -162,6 +170,12 @@ load_atomic16(void *pv) r.u = qatomic_read__nocheck(p); return r.s; +#elif defined(__x86_64__) + Int128Alias r; + + /* Via HAVE_al16_fast, have_atomic16 is true. */ + asm("vmovdqa %1, %0" : "=x" (r.u) : "m" (*(Int128 *)pv)); + return r.s; #else qemu_build_not_reached(); #endif @@ -383,6 +397,24 @@ load_atom_extract_al16_or_al8(void *pv, int s) r = qatomic_read__nocheck(p16); } return r >> shr; +#elif defined(__x86_64__) + uintptr_t pi = (uintptr_t)pv; + int shr = (pi & 7) * 8; + uint64_t a, b; + + /* Via HAVE_al16_fast, have_atomic16 is true. */ + pv = (void *)(pi & ~7); + if (pi & 8) { + uint64_t *p8 = __builtin_assume_aligned(pv, 16, 8); + a = qatomic_read__nocheck(p8); + b = qatomic_read__nocheck(p8 + 1); + } else { + asm("vmovdqa %2, %0\n\tvpextrq $1, %0, %1" + : "=x"(a), "=r"(b) : "m" (*(__uint128_t *)pv)); + } + asm("shrd %b2, %1, %0" : "+r"(a) : "r"(b), "c"(shr)); + + return a; #else qemu_build_not_reached(); #endif @@ -699,23 +731,35 @@ static inline void ATTRIBUTE_ATOMIC128_OPT store_atomic16(void *pv, Int128Alias val) { #if defined(CONFIG_ATOMIC128) - __uint128_t *pu = __builtin_assume_aligned(pv, 16); - qatomic_set__nocheck(pu, val.u); -#elif defined(CONFIG_CMPXCHG128) - __uint128_t *pu = __builtin_assume_aligned(pv, 16); - __uint128_t o; - - /* - * Without CONFIG_ATOMIC128, __atomic_compare_exchange_n will always - * defer to libatomic, so we must use __sync_val_compare_and_swap_16 - * and accept the sequential consistency that comes with it. - */ - do { - o = *pu; - } while (!__sync_bool_compare_and_swap_16(pu, o, val.u)); -#else - qemu_build_not_reached(); + { + __uint128_t *pu = __builtin_assume_aligned(pv, 16); + qatomic_set__nocheck(pu, val.u); + return; + } #endif +#if defined(__x86_64__) + if (HAVE_al16_fast) { + asm("vmovdqa %1, %0" : "=m"(*(__uint128_t *)pv) : "x" (val.u)); + return; + } +#endif +#if defined(CONFIG_CMPXCHG128) + { + __uint128_t *pu = __builtin_assume_aligned(pv, 16); + __uint128_t o; + + /* + * Without CONFIG_ATOMIC128, __atomic_compare_exchange_n will always + * defer to libatomic, so we must use __sync_val_compare_and_swap_16 + * and accept the sequential consistency that comes with it. + */ + do { + o = *pu; + } while (!__sync_bool_compare_and_swap_16(pu, o, val.u)); + return; + } +#endif + qemu_build_not_reached(); } /**