| Message ID | 20230411010512.5375-18-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | tcg: Simplify calls to load/store helpers | expand |
On 11/4/23 03:04, Richard Henderson wrote: > We will want a backend interface for register swapping. > This is only properly defined for x86; all others get a > stub version that always indicates failure. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > tcg/tcg.c | 2 ++ > tcg/aarch64/tcg-target.c.inc | 5 +++++ > tcg/arm/tcg-target.c.inc | 5 +++++ > tcg/i386/tcg-target.c.inc | 8 ++++++++ > tcg/loongarch64/tcg-target.c.inc | 5 +++++ > tcg/mips/tcg-target.c.inc | 5 +++++ > tcg/ppc/tcg-target.c.inc | 5 +++++ > tcg/riscv/tcg-target.c.inc | 5 +++++ > tcg/s390x/tcg-target.c.inc | 5 +++++ > tcg/sparc64/tcg-target.c.inc | 5 +++++ > tcg/tci/tcg-target.c.inc | 5 +++++ > 11 files changed, 55 insertions(+) > > diff --git a/tcg/tcg.c b/tcg/tcg.c > index 328e018a80..fde5ccc57c 100644 > --- a/tcg/tcg.c > +++ b/tcg/tcg.c > @@ -115,6 +115,8 @@ static void tcg_out_exts_i32_i64(TCGContext *s, TCGReg ret, TCGReg arg); > static void tcg_out_extu_i32_i64(TCGContext *s, TCGReg ret, TCGReg arg); > static void tcg_out_extrl_i64_i32(TCGContext *s, TCGReg ret, TCGReg arg); > static void tcg_out_addi_ptr(TCGContext *s, TCGReg, TCGReg, tcg_target_long); > +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) > + __attribute__((unused)); Can you document this in docs/devel/tcg-ops.rst? Otherwise, Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
On 22/4/23 01:05, Philippe Mathieu-Daudé wrote: > On 11/4/23 03:04, Richard Henderson wrote: >> We will want a backend interface for register swapping. >> This is only properly defined for x86; all others get a >> stub version that always indicates failure. >> >> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> >> --- >> tcg/tcg.c | 2 ++ >> tcg/aarch64/tcg-target.c.inc | 5 +++++ >> tcg/arm/tcg-target.c.inc | 5 +++++ >> tcg/i386/tcg-target.c.inc | 8 ++++++++ >> tcg/loongarch64/tcg-target.c.inc | 5 +++++ >> tcg/mips/tcg-target.c.inc | 5 +++++ >> tcg/ppc/tcg-target.c.inc | 5 +++++ >> tcg/riscv/tcg-target.c.inc | 5 +++++ >> tcg/s390x/tcg-target.c.inc | 5 +++++ >> tcg/sparc64/tcg-target.c.inc | 5 +++++ >> tcg/tci/tcg-target.c.inc | 5 +++++ >> 11 files changed, 55 insertions(+) >> >> diff --git a/tcg/tcg.c b/tcg/tcg.c >> index 328e018a80..fde5ccc57c 100644 >> --- a/tcg/tcg.c >> +++ b/tcg/tcg.c >> @@ -115,6 +115,8 @@ static void tcg_out_exts_i32_i64(TCGContext *s, >> TCGReg ret, TCGReg arg); >> static void tcg_out_extu_i32_i64(TCGContext *s, TCGReg ret, TCGReg >> arg); >> static void tcg_out_extrl_i64_i32(TCGContext *s, TCGReg ret, TCGReg >> arg); >> static void tcg_out_addi_ptr(TCGContext *s, TCGReg, TCGReg, >> tcg_target_long); >> +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, >> TCGReg r2) >> + __attribute__((unused)); > > Can you document this in docs/devel/tcg-ops.rst? Oops this is the backend, thus not needed. > Otherwise, > > Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> >
diff --git a/tcg/tcg.c b/tcg/tcg.c index 328e018a80..fde5ccc57c 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -115,6 +115,8 @@ static void tcg_out_exts_i32_i64(TCGContext *s, TCGReg ret, TCGReg arg); static void tcg_out_extu_i32_i64(TCGContext *s, TCGReg ret, TCGReg arg); static void tcg_out_extrl_i64_i32(TCGContext *s, TCGReg ret, TCGReg arg); static void tcg_out_addi_ptr(TCGContext *s, TCGReg, TCGReg, tcg_target_long); +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) + __attribute__((unused)); static void tcg_out_exit_tb(TCGContext *s, uintptr_t arg); static void tcg_out_goto_tb(TCGContext *s, int which); static void tcg_out_op(TCGContext *s, TCGOpcode opc, diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 29bc97ed1c..4ec3cf3172 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -1106,6 +1106,11 @@ static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg rd, tcg_out_insn(s, 3305, LDR, 0, rd); } +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index f865294861..4a5d57a41c 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -2607,6 +2607,11 @@ static void tcg_out_movi(TCGContext *s, TCGType type, tcg_out_movi32(s, COND_AL, ret, arg); } +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index 4847da7e1a..ce87f8fbc9 100644 --- a/tcg/i386/tcg-target.c.inc +++ b/tcg/i386/tcg-target.c.inc @@ -460,6 +460,7 @@ static bool tcg_target_const_match(int64_t val, TCGType type, int ct) #define OPC_VPTERNLOGQ (0x25 | P_EXT3A | P_DATA16 | P_VEXW | P_EVEX) #define OPC_VZEROUPPER (0x77 | P_EXT) #define OPC_XCHG_ax_r32 (0x90) +#define OPC_XCHG_EvGv (0x87) #define OPC_GRP3_Eb (0xf6) #define OPC_GRP3_Ev (0xf7) @@ -1078,6 +1079,13 @@ static void tcg_out_movi(TCGContext *s, TCGType type, } } +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + int rexw = type == TCG_TYPE_I32 ? 0 : P_REXW; + tcg_out_modrm(s, OPC_XCHG_EvGv + rexw, r1, r2); + return true; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index fc98b9b31b..0940788c6f 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -419,6 +419,11 @@ static void tcg_out_addi(TCGContext *s, TCGType type, TCGReg rd, } } +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc index f103cdb4e6..a83ebe8729 100644 --- a/tcg/mips/tcg-target.c.inc +++ b/tcg/mips/tcg-target.c.inc @@ -597,6 +597,11 @@ static void tcg_out_extrl_i64_i32(TCGContext *s, TCGReg rd, TCGReg rs) tcg_out_ext32s(s, rd, rs); } +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index b1d9c0bbe4..77abb7d20c 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -1154,6 +1154,11 @@ static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg ret, } } +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index 081782d8c6..266fe1433d 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -561,6 +561,11 @@ static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg rd, tcg_out_opc_imm(s, OPC_LD, rd, rd, 0); } +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 0578fce4d7..b399798664 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -1076,6 +1076,11 @@ static inline bool tcg_out_sti(TCGContext *s, TCGType type, TCGArg val, return false; } +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc index 99ba0fdc2b..086981f097 100644 --- a/tcg/sparc64/tcg-target.c.inc +++ b/tcg/sparc64/tcg-target.c.inc @@ -542,6 +542,11 @@ static void tcg_out_extrl_i64_i32(TCGContext *s, TCGReg rd, TCGReg rs) tcg_out_mov(s, TCG_TYPE_I32, rd, rs); } +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 68531e35ec..4cf03a579c 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -645,6 +645,11 @@ static void tcg_out_extrl_i64_i32(TCGContext *s, TCGReg rd, TCGReg rs) tcg_out_mov(s, TCG_TYPE_I32, rd, rs); } +static bool tcg_out_xchg(TCGContext *s, TCGType type, TCGReg r1, TCGReg r2) +{ + return false; +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) {
We will want a backend interface for register swapping. This is only properly defined for x86; all others get a stub version that always indicates failure. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- tcg/tcg.c | 2 ++ tcg/aarch64/tcg-target.c.inc | 5 +++++ tcg/arm/tcg-target.c.inc | 5 +++++ tcg/i386/tcg-target.c.inc | 8 ++++++++ tcg/loongarch64/tcg-target.c.inc | 5 +++++ tcg/mips/tcg-target.c.inc | 5 +++++ tcg/ppc/tcg-target.c.inc | 5 +++++ tcg/riscv/tcg-target.c.inc | 5 +++++ tcg/s390x/tcg-target.c.inc | 5 +++++ tcg/sparc64/tcg-target.c.inc | 5 +++++ tcg/tci/tcg-target.c.inc | 5 +++++ 11 files changed, 55 insertions(+)