From patchwork Wed Apr 5 16:04:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 670321 Delivered-To: patch@linaro.org Received: by 2002:a5d:4d08:0:0:0:0:0 with SMTP id z8csp364053wrt; Wed, 5 Apr 2023 09:07:04 -0700 (PDT) X-Google-Smtp-Source: AKy350ZDjqwgq3EywjLYUVurlt1qFSJhyrnzzspgNsvP3ynsvJ9MRmW+ZXHaur+/nCrhA4FzZoHG X-Received: by 2002:a05:7500:4e84:b0:fc:ec57:73b7 with SMTP id lc4-20020a0575004e8400b000fcec5773b7mr463044gab.20.1680710823708; Wed, 05 Apr 2023 09:07:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680710823; cv=none; d=google.com; s=arc-20160816; b=P4urn/JxjBNXO0izrIgTgdj25oCMweq8ehLCfFTl3E716NeuQULoPMtPwccNkjoJWE aQ60DZbNpEqLm453DZyFFy/t7tqKIWqCMY8gqv4R4KoOXOaCAPEL/ZibgcdLyiCY8ktu XA6fKJnPca+QSzG9eNwKC1yEq4BuBzk9TCdwT8upoKk4a6gB3063E+U58mWWhRjyyyhE msaymfobcRzBHQHRoqS7hWokhfrIDB1/iEzPWCOkAxw2NgljTPpTJvb2KbJR86NX/aQC hnvyCsUj+IeMwJIEdsAHXoz4GY4gJqM8ubMVuUsvk2+vglnwW963NcdQDEE1DhcAZWkG 1Mcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=v6WERmjWn5FvlAk9wBZ9HpDjQNTvh7yNAmb4fbxF/bQ=; b=pT//5mL+xmUscJctYjeCvzW3rl12Jf2EV6YAYrX0guQqOMPltLwbsOAX4PFhcF/q0T dB8ElYhKS+MtfxHUhAACqf5DiYS9wVO6mZFOyesFXUdmC3jQZrlVCty5ZlkE8yM92l1G E39ADyOSvWiU25tyxNsXn93Ui+zKZ2pqF59LJTfv1hiXI+m6NYVfKaxq0iol7vA7BgE/ tWp7RlNuk3tsYuDfvCqFQNq+weAh+cVSQLzdI32ORv27gZFaSd+o7jctmGOGxDor8ZPX eOMIuah7hGbNK2WiSZsD8tPkWmu0LhoFkGqVvRJVfloa9Daio7wNXxuVLUJsm3NUzl3y 9dxQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ui9pQqlk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id r136-20020a37448e000000b0073902217295si9460840qka.293.2023.04.05.09.07.03 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 05 Apr 2023 09:07:03 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ui9pQqlk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pk5dz-0006Xx-AB; Wed, 05 Apr 2023 12:05:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pk5dx-0006V9-HQ for qemu-devel@nongnu.org; Wed, 05 Apr 2023 12:05:53 -0400 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pk5du-00082v-NV for qemu-devel@nongnu.org; Wed, 05 Apr 2023 12:05:53 -0400 Received: by mail-wm1-x335.google.com with SMTP id m6-20020a05600c3b0600b003ee6e324b19so22308882wms.1 for ; Wed, 05 Apr 2023 09:05:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1680710749; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=v6WERmjWn5FvlAk9wBZ9HpDjQNTvh7yNAmb4fbxF/bQ=; b=ui9pQqlkMvaDWCZp6I6ifckgckCFMdULH8djIjHBtGiKqLjSUyanx69f6iIYVMfxSY PDG366DUK3lbyUBNP2TISRXho9Y39mi+0yOtKEssWyJs8AW+r0iZXdfVcgRVJmp8SyvR jPWJ8qjkwLGf7F7Iy7M1OZPrcf0uWtn65EXI26LFqGpDfTiuMP6i+YQtxah+yEf+3N2I NfyrUvV8ItcveuyyyrfgYuOGCWAsChzWI0Cy5GdHPeHvnwaJTnTNUDpZ7tRMAHPsQguV 7ankTk82Gs8dVyGeY4jCBSGFQ/hPIEZB2U94cG+S76nY5p/JXNSjjluwvo8eICuJ2rnX GNLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680710749; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=v6WERmjWn5FvlAk9wBZ9HpDjQNTvh7yNAmb4fbxF/bQ=; b=Exe/NRP/sJLdKBTJNGV0YOf+7fddqj9LJMbzm468vxz8yppYJTP6/W6nYFu1WNigAu qt2jzR7V6Rfh2uq9BZ/VEQoaQxRSteEoLoDBUrJ5xZLfzRZD/13jUIUqpxoF3YqWeag6 qF3upyODFNlT/vEIhHVik44GEgSJFmGUZWnQ4/yPMHUOn0rpQF3yDqSI5SMC54QwUgTc lRhrrHq9M+Ny3n33Z7cJEVGNUUPvfcLkNkYgzr4twfuIdra1prBGWio3uU9nxMHuCTEa 7LSCPwT66up8MKgHilT5czuQTH7Pzd5uqAhdiPYENCXdYXTtacPkQEKIN89YFQelimIB j9Kg== X-Gm-Message-State: AAQBX9d7KmFGZ1GX1HSTscvOswskreLQukmneJOgjsp7hEYona5+uapi S+RXUl/diqmHn/NsgVZ6XXY4NIvobS7XmdYw0a8= X-Received: by 2002:a05:600c:ace:b0:3ed:ea48:cd92 with SMTP id c14-20020a05600c0ace00b003edea48cd92mr5367145wmr.15.1680710749843; Wed, 05 Apr 2023 09:05:49 -0700 (PDT) Received: from localhost.localdomain (4ab54-h01-176-184-52-81.dsl.sta.abo.bbox.fr. [176.184.52.81]) by smtp.gmail.com with ESMTPSA id p26-20020a1c545a000000b003edf2ae2432sm2600498wmi.7.2023.04.05.09.05.48 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 05 Apr 2023 09:05:49 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, kvm@vger.kernel.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei Subject: [RFC PATCH 09/10] target/riscv: Restrict KVM-specific fields from ArchCPU Date: Wed, 5 Apr 2023 18:04:53 +0200 Message-Id: <20230405160454.97436-10-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230405160454.97436-1-philmd@linaro.org> References: <20230405160454.97436-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org These fields shouldn't be accessed when KVM is not available. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel Henrique Barboza --- RFC: The migration part is likely invalid... kvmtimer_needed() is defined in target/riscv/machine.c as static bool kvmtimer_needed(void *opaque) { return kvm_enabled(); } which depends on a host feature. --- target/riscv/cpu.h | 2 ++ target/riscv/machine.c | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 638e47c75a..82939235ab 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -377,12 +377,14 @@ struct CPUArchState { hwaddr kernel_addr; hwaddr fdt_addr; +#ifdef CONFIG_KVM /* kvm timer */ bool kvm_timer_dirty; uint64_t kvm_timer_time; uint64_t kvm_timer_compare; uint64_t kvm_timer_state; uint64_t kvm_timer_frequency; +#endif /* CONFIG_KVM */ }; OBJECT_DECLARE_CPU_TYPE(RISCVCPU, RISCVCPUClass, RISCV_CPU) diff --git a/target/riscv/machine.c b/target/riscv/machine.c index 9c455931d8..e45d564ec3 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -201,10 +201,12 @@ static bool kvmtimer_needed(void *opaque) static int cpu_post_load(void *opaque, int version_id) { +#ifdef CONFIG_KVM RISCVCPU *cpu = opaque; CPURISCVState *env = &cpu->env; env->kvm_timer_dirty = true; +#endif return 0; } @@ -215,9 +217,11 @@ static const VMStateDescription vmstate_kvmtimer = { .needed = kvmtimer_needed, .post_load = cpu_post_load, .fields = (VMStateField[]) { +#ifdef CONFIG_KVM VMSTATE_UINT64(env.kvm_timer_time, RISCVCPU), VMSTATE_UINT64(env.kvm_timer_compare, RISCVCPU), VMSTATE_UINT64(env.kvm_timer_state, RISCVCPU), +#endif VMSTATE_END_OF_LIST() } };