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([2602:ae:1541:f901:c23d:b6:6be1:f147]) by smtp.gmail.com with ESMTPSA id jw1-20020a170903278100b0019cd1ee1523sm21670633plb.30.2023.03.28.15.58.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Mar 2023 15:58:21 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 15/15] softmmu: Restore use of CPU watchpoint for all accelerators Date: Tue, 28 Mar 2023 15:58:06 -0700 Message-Id: <20230328225806.2278728-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230328225806.2278728-1-richard.henderson@linaro.org> References: <20230328225806.2278728-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Philippe Mathieu-Daudé CPU watchpoints can be use by non-TCG accelerators. KVM uses them: $ git grep CPUWatchpoint|fgrep kvm target/arm/kvm64.c:1558: CPUWatchpoint *wp = find_hw_watchpoint(cs, debug_exit->far); target/i386/kvm/kvm.c:5216:static CPUWatchpoint hw_watchpoint; target/ppc/kvm.c:443:static CPUWatchpoint hw_watchpoint; target/s390x/kvm/kvm.c:139:static CPUWatchpoint hw_watchpoint; See for example commit e4482ab7e3 ("target-arm: kvm - add support for HW assisted debug"): This adds basic support for HW assisted debug. The ioctl interface to KVM allows us to pass an implementation defined number of break and watch point registers. [...] This partially reverts commit 2609ec2868e6c286e755a73b4504714a0296a. Fixes: 2609ec2868 ("softmmu: Extract watchpoint API from physmem.c") Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20230328173117.15226-4-philmd@linaro.org> Signed-off-by: Richard Henderson --- include/hw/core/cpu.h | 2 +- softmmu/watchpoint.c | 4 ++++ softmmu/meson.build | 2 +- 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index ce312745d5..397fd3ac68 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -949,7 +949,7 @@ static inline bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask) return false; } -#if !defined(CONFIG_TCG) || defined(CONFIG_USER_ONLY) +#if defined(CONFIG_USER_ONLY) static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, int flags, CPUWatchpoint **watchpoint) { diff --git a/softmmu/watchpoint.c b/softmmu/watchpoint.c index 9d6ae68499..5350163385 100644 --- a/softmmu/watchpoint.c +++ b/softmmu/watchpoint.c @@ -104,6 +104,8 @@ void cpu_watchpoint_remove_all(CPUState *cpu, int mask) } } +#ifdef CONFIG_TCG + /* * Return true if this watchpoint address matches the specified * access (ie the address range covered by the watchpoint overlaps @@ -220,3 +222,5 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, } } } + +#endif /* CONFIG_TCG */ diff --git a/softmmu/meson.build b/softmmu/meson.build index 0180577517..1a7c7ac089 100644 --- a/softmmu/meson.build +++ b/softmmu/meson.build @@ -5,11 +5,11 @@ specific_ss.add(when: 'CONFIG_SOFTMMU', if_true: [files( 'physmem.c', 'qtest.c', 'dirtylimit.c', + 'watchpoint.c', )]) specific_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: [files( 'icount.c', - 'watchpoint.c', )]) softmmu_ss.add(files(