From patchwork Tue Mar 28 17:31:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 667868 Delivered-To: patch@linaro.org Received: by 2002:a5d:4d08:0:0:0:0:0 with SMTP id z8csp1799253wrt; Tue, 28 Mar 2023 10:32:28 -0700 (PDT) X-Google-Smtp-Source: AKy350b6nAoq8d0heyVPhJkFQLwRCwliPR54cwqK4NsEdF0R4ivKErMgVSTX7gUd3Nq95UL3j2DO X-Received: by 2002:a67:bd08:0:b0:416:fda7:77ec with SMTP id y8-20020a67bd08000000b00416fda777ecmr6316142vsq.32.1680024748109; Tue, 28 Mar 2023 10:32:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680024748; cv=none; d=google.com; s=arc-20160816; b=d272mCLgpg3GWuAhwv8zQW3UsNYSODzv/AtdxM5n1W/plBUViMlIaq8FOKzVt4Vvw2 dqQHplKMsHfkeMnNHErSAwzgVxWQ7PyVaye+HXz2zoS/+10/7dGBsIwnlB1+dD6pvoXx 9YYAqao/vaLkepKuj73oWIZqSH6iRcFzMhqSQBIVOO9C0mjXbY4kcahFgTh9Kd5aGsKy uOLeVHxps8pk55JbBKN490rPHh/W8jktE/Je6clrXO23t/74bcnslfl4kw/j5LOetd8S EXDQrLkR3Rlx3ffrkxAzJBMHDGhKmc81ZANE8umF9DzsP9pFzIXiQerw2q02PlLebuj+ OAtw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=gqrAcdahU7oRsjBb/8pSIcN5O6oYYEmsOBvgu0vyrxs=; b=vAEafHf8LDYfT6kOiqKi88H1XAfuCrDU0MyjtxZmPr3L/2JiuK0Udu6BarVSJmg0lJ 8R+qJVAJaVjVgKFC5qZ3cKToz7Gtl7G5aw1cfYKiL050YNYJUOkD5ztK1TdyploG76d5 31feZtyygGu+tteSkouLQF1WouXWLnplT51fBTEAEKjE/DHLEWmPpwcKz3U6TJG+k2R/ 6oawejVzD4ou3P8nV2Vao0Nzpiv9JDgr4wKr/4wvSDssUBz3hhdEPXFL2lGSOCv5sDxt j+HWoh3v7QYqZIn6sUgBmZUVADfs5NvWyxErVjLSJR6H1mgsBu6PfVaUXQKqUD7nN8e3 NyhA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SABEbYWv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id a127-20020ae9e885000000b00742709be80asi17296588qkg.87.2023.03.28.10.32.27 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 28 Mar 2023 10:32:28 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SABEbYWv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1phDAS-0004cI-E4; Tue, 28 Mar 2023 13:31:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1phDAQ-0004bd-QT for qemu-devel@nongnu.org; Tue, 28 Mar 2023 13:31:30 -0400 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1phDAO-0003P0-M5 for qemu-devel@nongnu.org; Tue, 28 Mar 2023 13:31:30 -0400 Received: by mail-wr1-x432.google.com with SMTP id i9so13051703wrp.3 for ; Tue, 28 Mar 2023 10:31:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1680024687; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gqrAcdahU7oRsjBb/8pSIcN5O6oYYEmsOBvgu0vyrxs=; b=SABEbYWvAsqCtIuHHVJMPwwDiNUufQXexHxLxY5o5DWRxqkTyuYgXpiHdWCj8XbOsQ g2U4QrLITKjxpOl8htTloTznG9fy4SiSh9z2u7MZvSPDZ05sjPP2DcRASJ/ECcuk/hTn FanhhBJqgl+fd+AuRqtPXRNm/2RDJVxjbtBaDeUrxzPG/rYs0uzXUcPL0l3BwMp4iHxL un7gprTCArYbizF2Bh7zO4P+Mo0WIv3AKHLAkD5T3pWKM5VOrrSO/foqJH0NKcYwMMQ+ RPLT/Zs7KI6Mup3we0uqbNOsD9fpV0CoT3pP/tXfgF38zGe/IQGujvU4QM0ptEM3Gj4w M1cg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680024687; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gqrAcdahU7oRsjBb/8pSIcN5O6oYYEmsOBvgu0vyrxs=; b=TOVtFQKlSRSrf3WvQOa3/UWVu86b8lC9eN907ORTzmW4FwXsvColFQQE++rUZOD3E7 uEXCczoQF6GuWu140Ig4Q4eFBc0mmmgQ4vKwIzuDB43GE60LIaF+xvAQNgGjLk2QJTUg v9mRJ806Enm8OscFWImWkzHtTXVqZEP9jOB1/nrzVvrJXNrLpyNWTAGnId6u1soMYd6L Y9tWw3/oVhmbcQnvtAWb6uWfS/BSMIeNgrf5wrjb4Tq5o3ckImVXak6JOpdXxlG13i0d JPS+7WndIyb4gPzbk/zqSNH889WxYm5sOp9HcCu6yS2OuXAjGWyqjs9xdCfqTzr3OJpH i1GQ== X-Gm-Message-State: AAQBX9fB2P8x2b2k4lTCwt+GbHnHFQdPTCoRcrjlusruFV5tkNeUPJlM ITBupqOstZFPPES6FlkHzX9j65cnMQ7nVbYTevg= X-Received: by 2002:a5d:6381:0:b0:2d1:9b6b:92a with SMTP id p1-20020a5d6381000000b002d19b6b092amr12727581wru.23.1680024687011; Tue, 28 Mar 2023 10:31:27 -0700 (PDT) Received: from localhost.localdomain ([176.187.210.212]) by smtp.gmail.com with ESMTPSA id t13-20020adfe10d000000b002db1b66ea8fsm14670416wrz.57.2023.03.28.10.31.24 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 28 Mar 2023 10:31:26 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Halil Pasic , David Gibson , Daniel Henrique Barboza , qemu-ppc@nongnu.org, Yanan Wang , David Hildenbrand , Christian Borntraeger , Eduardo Habkost , Paolo Bonzini , Marcel Apfelbaum , Greg Kurz , kvm@vger.kernel.org, Ilya Leoshkevich , Peter Maydell , Fabiano Rosas , =?utf-8?q?Alex_Benn=C3=A9e?= , Thomas Huth , Richard Henderson , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?C?= =?utf-8?q?=C3=A9dric_Le_Goater?= Subject: [PATCH-for-8.0 v2 1/3] softmmu: Restrict cpu_check_watchpoint / address_matches to TCG accel Date: Tue, 28 Mar 2023 19:31:15 +0200 Message-Id: <20230328173117.15226-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230328173117.15226-1-philmd@linaro.org> References: <20230328173117.15226-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Both cpu_check_watchpoint() and cpu_watchpoint_address_matches() are specific to TCG system emulation. Declare them in "tcg-cpu-ops.h" to be sure accessing them from non-TCG code is a compilation error. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Fabiano Rosas --- include/hw/core/cpu.h | 37 ------------------------------ include/hw/core/tcg-cpu-ops.h | 43 +++++++++++++++++++++++++++++++++++ target/arm/tcg/mte_helper.c | 1 + target/arm/tcg/sve_helper.c | 1 + target/s390x/tcg/mem_helper.c | 1 + 5 files changed, 46 insertions(+), 37 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 821e937020..ce312745d5 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -970,17 +970,6 @@ static inline void cpu_watchpoint_remove_by_ref(CPUState *cpu, static inline void cpu_watchpoint_remove_all(CPUState *cpu, int mask) { } - -static inline void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, - MemTxAttrs atr, int fl, uintptr_t ra) -{ -} - -static inline int cpu_watchpoint_address_matches(CPUState *cpu, - vaddr addr, vaddr len) -{ - return 0; -} #else int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, int flags, CPUWatchpoint **watchpoint); @@ -988,32 +977,6 @@ int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len, int flags); void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint); void cpu_watchpoint_remove_all(CPUState *cpu, int mask); - -/** - * cpu_check_watchpoint: - * @cpu: cpu context - * @addr: guest virtual address - * @len: access length - * @attrs: memory access attributes - * @flags: watchpoint access type - * @ra: unwind return address - * - * Check for a watchpoint hit in [addr, addr+len) of the type - * specified by @flags. Exit via exception with a hit. - */ -void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, - MemTxAttrs attrs, int flags, uintptr_t ra); - -/** - * cpu_watchpoint_address_matches: - * @cpu: cpu context - * @addr: guest virtual address - * @len: access length - * - * Return the watchpoint flags that apply to [addr, addr+len). - * If no watchpoint is registered for the range, the result is 0. - */ -int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len); #endif /** diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index 20e3c0ffbb..0ae08df47e 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -175,4 +175,47 @@ struct TCGCPUOps { }; +#if defined(CONFIG_USER_ONLY) + +static inline void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, + MemTxAttrs atr, int fl, uintptr_t ra) +{ +} + +static inline int cpu_watchpoint_address_matches(CPUState *cpu, + vaddr addr, vaddr len) +{ + return 0; +} + +#else + +/** + * cpu_check_watchpoint: + * @cpu: cpu context + * @addr: guest virtual address + * @len: access length + * @attrs: memory access attributes + * @flags: watchpoint access type + * @ra: unwind return address + * + * Check for a watchpoint hit in [addr, addr+len) of the type + * specified by @flags. Exit via exception with a hit. + */ +void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, + MemTxAttrs attrs, int flags, uintptr_t ra); + +/** + * cpu_watchpoint_address_matches: + * @cpu: cpu context + * @addr: guest virtual address + * @len: access length + * + * Return the watchpoint flags that apply to [addr, addr+len). + * If no watchpoint is registered for the range, the result is 0. + */ +int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len); + +#endif + #endif /* TCG_CPU_OPS_H */ diff --git a/target/arm/tcg/mte_helper.c b/target/arm/tcg/mte_helper.c index fee3c7eb96..a4f3f92bc0 100644 --- a/target/arm/tcg/mte_helper.c +++ b/target/arm/tcg/mte_helper.c @@ -25,6 +25,7 @@ #include "exec/ram_addr.h" #include "exec/cpu_ldst.h" #include "exec/helper-proto.h" +#include "hw/core/tcg-cpu-ops.h" #include "qapi/error.h" #include "qemu/guest-random.h" diff --git a/target/arm/tcg/sve_helper.c b/target/arm/tcg/sve_helper.c index 9a8951afa4..ccf5e5beca 100644 --- a/target/arm/tcg/sve_helper.c +++ b/target/arm/tcg/sve_helper.c @@ -27,6 +27,7 @@ #include "tcg/tcg.h" #include "vec_internal.h" #include "sve_ldst_internal.h" +#include "hw/core/tcg-cpu-ops.h" /* Return a value for NZCV as per the ARM PredTest pseudofunction. diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index b93dbd3dad..8b58b8d88d 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -26,6 +26,7 @@ #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" +#include "hw/core/tcg-cpu-ops.h" #include "qemu/int128.h" #include "qemu/atomic128.h" #include "trace.h"