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[209.51.188.17]) by mx.google.com with ESMTPS id q22-20020a05620a0d9600b0074161deae65si5764816qkl.559.2023.03.20.03.12.48 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 20 Mar 2023 03:12:49 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=W1EBjXTm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1peCTd-0003oA-Sa; Mon, 20 Mar 2023 06:10:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1peCTT-0003l1-Ay for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:44 -0400 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1peCTQ-0000D0-KG for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:42 -0400 Received: by mail-wr1-x42c.google.com with SMTP id d17so1322790wrb.11 for ; Mon, 20 Mar 2023 03:10:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679307039; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cva0ieax6jGML0EyVMQUzaX64BrxGUwBDv8qEmGoIEA=; b=W1EBjXTmsyQ37x5a7mBbECHtVYXX+LQD/AUAD+3j16GvogtHMZkvvcG0jZaUSJfZ9i Un0c7imkaCWXwlrh6ApK4efLcdt44CKRGwftcGRtXuE4TCpV11EZ9SfE6A1lBIOOoXNJ VBQsvMmxz/UJBAubJRRZIJ34MhVS0JT/Ce3v7OPWiQs29K27++75Bn4Ia605HjqSbJQX WSItGwEZhnYtMBo/k9/GLWJ2cDzv2etEIICTvVzV9fVNKs6UooJCxwZEmXnEN/5HU9ou 2+bSyihk2JXqe0uz71VKMp/1uiMzQ6uTz9NY/sHTa8j7x5DP5DpgGP+8hT2BpQzAUwm/ C8QQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679307039; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cva0ieax6jGML0EyVMQUzaX64BrxGUwBDv8qEmGoIEA=; b=Lpb18FD6N6wrpRWJq59CzRxr8Y+n9vxknV5VNKbhQQiOrWbujloMsKtbpHr3Z8Pnk3 UY2wutmIbOz8xnby9Z+CbN/Q5MIPPFl7gi3kmRtsJURO2DVHvnkEGopqf5yxRn4Ac2sW wRIrXQ/GaiplgX/uisaiZ4NHCGLQCMlnCEPhGseRs2jtatU+ex7sRRg6izyXHt1TJYdd jLrnrYGBt/xMkgusl9rCrFeu7GHiVdObBE1uXl8VrwGkwfFqWio3S0ztrfTVHU2/JGlP iQ0p9BAEZbDyDv4BnzVkfqnQExAF0DlussjB/sPoGWw5O1VDAi4PAd8Tsy5LcfOLm1Qz +pTQ== X-Gm-Message-State: AO0yUKUfdSPosMYGbT8cHjYCtdsCkpeRk1TknNSW5FgZ1r+7rPBuZ0x4 z3rUqvJ78msp4QT02S4hiD+dRA== X-Received: by 2002:a5d:6207:0:b0:2cf:eeae:88c3 with SMTP id y7-20020a5d6207000000b002cfeeae88c3mr12799388wru.32.1679307039149; Mon, 20 Mar 2023 03:10:39 -0700 (PDT) Received: from zen.linaroharston ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id v3-20020adfe4c3000000b002cf8220cc75sm604607wrm.24.2023.03.20.03.10.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 03:10:38 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id C7D5A1FFC0; Mon, 20 Mar 2023 10:10:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: Alessandro Di Federico , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , qemu-devel@nongnu.org Cc: Richard Henderson , Paolo Bonzini , Eduardo Habkost , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PATCH 09/10] accel/tcg: re-inline the filtering of virtual IRQs but data driven Date: Mon, 20 Mar 2023 10:10:34 +0000 Message-Id: <20230320101035.2214196-10-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230320101035.2214196-1-alex.bennee@linaro.org> References: <20230320101035.2214196-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Although only I386 currently uses it it is not inconceivable that other arches might find this facility useful. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- include/hw/core/tcg-cpu-ops.h | 5 +++++ accel/tcg/cpu-exec.c | 29 +++++++++-------------------- target/i386/tcg/tcg-cpu.c | 1 + 3 files changed, 15 insertions(+), 20 deletions(-) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index 66c0cecdde..8e8df8c330 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -121,6 +121,11 @@ struct TCGCPUOps { */ bool (*io_recompile_replay_branch)(CPUState *cpu, const TranslationBlock *tb); + /** + * @virtual_interrupts: IRQs that can be ignored for replay purposes + */ + int virtual_interrupts; + #else /** * record_sigsegv: diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 8fa19b7222..56be7956e7 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -737,22 +737,6 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret) return false; } -#ifndef CONFIG_USER_ONLY -/* - * CPU_INTERRUPT_POLL is a virtual event which gets converted into a - * "real" interrupt event later. It does not need to be recorded for - * replay purposes. - */ -static inline bool need_replay_interrupt(int interrupt_request) -{ -#if defined(TARGET_I386) - return !(interrupt_request & CPU_INTERRUPT_POLL); -#else - return true; -#endif -} -#endif /* !CONFIG_USER_ONLY */ - static inline bool cpu_handle_interrupt(CPUState *cpu, TranslationBlock **last_tb) { @@ -808,11 +792,16 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, * interrupt isn't processed, True when it is, and we should * restart on a new TB, and via longjmp via cpu_loop_exit. */ - CPUClass *cc = CPU_GET_CLASS(cpu); + struct TCGCPUOps const *tcg_ops = cpu->cc->tcg_ops; - if (cc->tcg_ops->cpu_exec_interrupt && - cc->tcg_ops->cpu_exec_interrupt(cpu, interrupt_request)) { - if (need_replay_interrupt(interrupt_request)) { + if (tcg_ops->cpu_exec_interrupt && + tcg_ops->cpu_exec_interrupt(cpu, interrupt_request)) { + /* + * Virtual events gets converted into a "real" + * interrupt event later. They do not need to be + * recorded for replay purposes. + */ + if (!(interrupt_request & tcg_ops->virtual_interrupts)) { replay_interrupt(); } /* diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index b942c306d6..750ae0f945 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -104,6 +104,7 @@ static const struct TCGCPUOps x86_tcg_ops = { .do_unaligned_access = x86_cpu_do_unaligned_access, .debug_excp_handler = breakpoint_handler, .debug_check_breakpoint = x86_debug_check_breakpoint, + .virtual_interrupts = CPU_INTERRUPT_POLL, #endif /* !CONFIG_USER_ONLY */ };