From patchwork Thu Mar 9 20:05:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 661105 Delivered-To: patch@linaro.org Received: by 2002:adf:a3c6:0:0:0:0:0 with SMTP id m6csp501306wrb; Thu, 9 Mar 2023 12:18:43 -0800 (PST) X-Google-Smtp-Source: AK7set/qodsbcO/VjsC/tzWRakFYlSHM6xrUX7E7x4JAt5hJNbeGEUu1MG8L9EA1ijLXVQAVtjMc X-Received: by 2002:a5d:4486:0:b0:2c9:ee31:962a with SMTP id j6-20020a5d4486000000b002c9ee31962amr14069355wrq.64.1678393123496; Thu, 09 Mar 2023 12:18:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678393123; cv=none; d=google.com; s=arc-20160816; b=MatghEhojoTVQk0IwixwO8xqIiDTPhSpYEcvosqJIaC5UpXMLK/kpPRxTsnkzsV12F i/ay/MN4BgpUE08qHnWyZ4vnPF6lY1g0usCt9Z8n7huv9kr16T+ieUgBAYzVN9UHc7MS fg8kRw89vUsj0Fd7Zq+5fKbtbabCJiMJMdHAayxh6DeVc7SUuh3P1WmBm3x0gbwf1rbI aHsGiKgUXMsPTZcssrZeSvtfbO36zgJNXrBJJmK0PyVkf7pgqtgpKwJJT6Fnb6CtiJLs CAHVEqjRu/3ev1/JQl0NXKWT9Oi6dZpBrsim1jTjDWHp495jeNUBvpMGT2u9fOD/Mdq5 DIBg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Z7YRqprwdTrCNTOAhizW1HEhWHUr/bYS0Cm8rOrDsWg=; b=hoGgZDqvW9eaSbrjtJrLVvcU3ZhfFVw+y+KS9JgfURa5HDIfFOWpgh2GXBWkoS8kpC NXTb6IpZxX8vNJAv5AGeodVynQUm0uPObD5ehckslXldEZUZ6j6TbyWgJwbHUMegd5Yx sGptKBtUP1drPpnQu2lrYI6+sJ16w6rAu/gabbvCjLIDFcsXWyjbj4p4kFb6Bx5OJm8x wkPrMn+9R/mFdH2Vpe/Mbhmr+Px8K5jJhmwXTAPudovXdJsYvETAneWmvF7G9txks9Sj 3OvUthot8kNSOv9HWizeNSnZigjMo71V69McquqBUL7nbZZz7jsElAkkOceMi6vKTT/v +0Eg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AqvM9HxX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id j8-20020adff548000000b002c706d71dcasi294348wrp.713.2023.03.09.12.18.43 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 09 Mar 2023 12:18:43 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AqvM9HxX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1paMeG-0001g6-DJ; Thu, 09 Mar 2023 15:14:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1paMdl-0000XZ-89 for qemu-devel@nongnu.org; Thu, 09 Mar 2023 15:13:31 -0500 Received: from mail-pl1-x636.google.com ([2607:f8b0:4864:20::636]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1paMdb-0002Gz-BP for qemu-devel@nongnu.org; Thu, 09 Mar 2023 15:13:22 -0500 Received: by mail-pl1-x636.google.com with SMTP id p20so3193036plw.13 for ; Thu, 09 Mar 2023 12:13:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678392787; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Z7YRqprwdTrCNTOAhizW1HEhWHUr/bYS0Cm8rOrDsWg=; b=AqvM9HxXdvtNJeY8Yk742Lu0EmfQbVJOiQlfXamEt3Z+HIZrWyGUEJWysL4XH7AelV aPk4QmF9DxwInPJm8dEaP/wwdzJk8RZJZJZpIy7GUSIW6ZkQargah7/ZVLsnsrzbibQU io1HkQlXMKzuqiwkRZIjYWXfXLuZ7ipHl7AlYgztHSLgAJUCUzz4Tis+9df6+iD1WFFi zmZU4lAmjUHoR4Eri6Gs8cRvK8r3+Q9NxoZhxdSBZkrIHZOy3dpCkGRpq7owUDhMNu2x FQRkER/yxjPbuUcYlbPlWVcpoaBoVbUwjMKKjd5FSpyyuBXQNkSPeYBdB9FoYKjvcW9p LnuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678392787; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Z7YRqprwdTrCNTOAhizW1HEhWHUr/bYS0Cm8rOrDsWg=; b=3IMTmqMStsYSAnrDmYzalM0f7pGkKHV9Vzj0eMSWiuMUbJBwSgWZGSuu1EipVJ7klB 5jYEV0sMKZPo+BE7s0kjwS7eMtRhj27n8F3EqEx2mL7iXhopLNaDD+PWkQ3/++Iut8Qe Dnvuuiud0+njr4IY9jFIZ+MEOoywd0QKsFuA6Fn6xzQ9697dC7JA4E5VPDwTEepiYgaW f2xch2Fip8RhOVL3wAOkVmrNmOK8+z3BzG9k9ycm15zMjVRHjUSuwwLfEp62SuA3pznT YSOIED9Tu9xIzTF0z0xBg+cg/S0RXoRXjH2kd5E82HdKQz9ELtad0bZ4VPMksk6Bzv6U 36eg== X-Gm-Message-State: AO0yUKW6GGkZXEfJSu8JJ2Hpj3HwKlMTMtlYOSE6xWcqVHXezgexXWEY wfCLZOxiKoamJlCNfox6ub9oIEohCqKuS/gSMHA= X-Received: by 2002:a05:6a20:258c:b0:cd:11e3:4105 with SMTP id k12-20020a056a20258c00b000cd11e34105mr22528513pzd.27.1678392787339; Thu, 09 Mar 2023 12:13:07 -0800 (PST) Received: from stoup.. ([2602:ae:154a:9f01:bf7f:79a0:a976:bdaf]) by smtp.gmail.com with ESMTPSA id v15-20020a62a50f000000b005b02ddd852dsm11867744pfm.142.2023.03.09.12.13.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 12:13:06 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Daniel Henrique Barboza Subject: [PULL v2 83/91] target/ppc: Avoid tcg_const_* in vsx-impl.c.inc Date: Thu, 9 Mar 2023 12:05:42 -0800 Message-Id: <20230309200550.3878088-84-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230309200550.3878088-1-richard.henderson@linaro.org> References: <20230309200550.3878088-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org All remaining uses are strictly read-only. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- target/ppc/translate/vsx-impl.c.inc | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index 9916784e64..0f5b0056f1 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -154,7 +154,7 @@ static void gen_lxvdsx(DisasContext *ctx) static void gen_bswap16x8(TCGv_i64 outh, TCGv_i64 outl, TCGv_i64 inh, TCGv_i64 inl) { - TCGv_i64 mask = tcg_const_i64(0x00FF00FF00FF00FF); + TCGv_i64 mask = tcg_constant_i64(0x00FF00FF00FF00FF); TCGv_i64 t0 = tcg_temp_new_i64(); TCGv_i64 t1 = tcg_temp_new_i64(); @@ -825,7 +825,7 @@ static bool trans_XSCVQPDP(DisasContext *ctx, arg_X_tb_rc *a) REQUIRE_INSNS_FLAGS2(ctx, ISA300); REQUIRE_VSX(ctx); - ro = tcg_const_i32(a->rc); + ro = tcg_constant_i32(a->rc); xt = gen_avr_ptr(a->rt); xb = gen_avr_ptr(a->rb); @@ -860,7 +860,7 @@ static void gen_##name(DisasContext *ctx) \ gen_exception(ctx, POWERPC_EXCP_VSXU); \ return; \ } \ - opc = tcg_const_i32(ctx->opcode); \ + opc = tcg_constant_i32(ctx->opcode); \ gen_helper_##name(cpu_env, opc); \ } @@ -900,7 +900,7 @@ static void gen_##name(DisasContext *ctx) \ gen_exception(ctx, POWERPC_EXCP_VSXU); \ return; \ } \ - opc = tcg_const_i32(ctx->opcode); \ + opc = tcg_constant_i32(ctx->opcode); \ xa = gen_vsr_ptr(xA(ctx->opcode)); \ xb = gen_vsr_ptr(xB(ctx->opcode)); \ gen_helper_##name(cpu_env, opc, xa, xb); \ @@ -915,7 +915,7 @@ static void gen_##name(DisasContext *ctx) \ gen_exception(ctx, POWERPC_EXCP_VSXU); \ return; \ } \ - opc = tcg_const_i32(ctx->opcode); \ + opc = tcg_constant_i32(ctx->opcode); \ xb = gen_vsr_ptr(xB(ctx->opcode)); \ gen_helper_##name(cpu_env, opc, xb); \ } @@ -929,7 +929,7 @@ static void gen_##name(DisasContext *ctx) \ gen_exception(ctx, POWERPC_EXCP_VSXU); \ return; \ } \ - opc = tcg_const_i32(ctx->opcode); \ + opc = tcg_constant_i32(ctx->opcode); \ xt = gen_vsr_ptr(rD(ctx->opcode) + 32); \ xa = gen_vsr_ptr(rA(ctx->opcode) + 32); \ xb = gen_vsr_ptr(rB(ctx->opcode) + 32); \ @@ -945,7 +945,7 @@ static void gen_##name(DisasContext *ctx) \ gen_exception(ctx, POWERPC_EXCP_VSXU); \ return; \ } \ - opc = tcg_const_i32(ctx->opcode); \ + opc = tcg_constant_i32(ctx->opcode); \ xt = gen_vsr_ptr(rD(ctx->opcode) + 32); \ xb = gen_vsr_ptr(rB(ctx->opcode) + 32); \ gen_helper_##name(cpu_env, opc, xt, xb); \ @@ -960,7 +960,7 @@ static void gen_##name(DisasContext *ctx) \ gen_exception(ctx, POWERPC_EXCP_VSXU); \ return; \ } \ - opc = tcg_const_i32(ctx->opcode); \ + opc = tcg_constant_i32(ctx->opcode); \ xa = gen_vsr_ptr(rA(ctx->opcode) + 32); \ xb = gen_vsr_ptr(rB(ctx->opcode) + 32); \ gen_helper_##name(cpu_env, opc, xa, xb); \ @@ -1994,8 +1994,8 @@ static void gen_xsxsigdp(DisasContext *ctx) exp = tcg_temp_new_i64(); t0 = tcg_temp_new_i64(); t1 = tcg_temp_new_i64(); - zr = tcg_const_i64(0); - nan = tcg_const_i64(2047); + zr = tcg_constant_i64(0); + nan = tcg_constant_i64(2047); get_cpu_vsr(t1, xB(ctx->opcode), true); tcg_gen_extract_i64(exp, t1, 52, 11); @@ -2026,8 +2026,8 @@ static void gen_xsxsigqp(DisasContext *ctx) get_cpu_vsr(xbl, rB(ctx->opcode) + 32, false); exp = tcg_temp_new_i64(); t0 = tcg_temp_new_i64(); - zr = tcg_const_i64(0); - nan = tcg_const_i64(32767); + zr = tcg_constant_i64(0); + nan = tcg_constant_i64(32767); tcg_gen_extract_i64(exp, xbh, 48, 15); tcg_gen_movi_i64(t0, 0x0001000000000000); @@ -2193,8 +2193,8 @@ static void gen_xvxsigdp(DisasContext *ctx) get_cpu_vsr(xbl, xB(ctx->opcode), false); exp = tcg_temp_new_i64(); t0 = tcg_temp_new_i64(); - zr = tcg_const_i64(0); - nan = tcg_const_i64(2047); + zr = tcg_constant_i64(0); + nan = tcg_constant_i64(2047); tcg_gen_extract_i64(exp, xbh, 52, 11); tcg_gen_movi_i64(t0, 0x0010000000000000);