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[95.127.39.43]) by smtp.gmail.com with ESMTPSA id g12-20020a05600c310c00b003dc49e0132asm4955231wmo.1.2023.03.02.14.41.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Mar 2023 14:42:01 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: John Snow , David Woodhouse , BALATON Zoltan , =?utf-8?q?Herv=C3=A9_Poussineau?= , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , Richard Henderson , qemu-block@nongnu.org Subject: [PATCH v3 08/18] hw/ide: Introduce generic ide_init_ioport() Date: Thu, 2 Mar 2023 23:40:48 +0100 Message-Id: <20230302224058.43315-9-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230302224058.43315-1-philmd@linaro.org> References: <20230302224058.43315-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Add ide_init_ioport() which is not restricted to the ISA bus. (Next commit will use it for a PCI device). Inspired-by: Mark Cave-Ayland Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- hw/ide/ioport.c | 12 ++++++++++-- include/hw/ide/internal.h | 2 ++ 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/hw/ide/ioport.c b/hw/ide/ioport.c index d869f8018a..ed7957dbae 100644 --- a/hw/ide/ioport.c +++ b/hw/ide/ioport.c @@ -46,8 +46,6 @@ int ide_bus_init_ioport_isa(IDEBus *bus, ISADevice *dev, { int ret; - /* ??? Assume only ISA and PCI configurations, and that the PCI-ISA - bridge has been setup properly to always register with ISA. */ ret = isa_register_portio_list(dev, &bus->portio_list, iobase, ide_portio_list, bus, "ide"); @@ -58,3 +56,13 @@ int ide_bus_init_ioport_isa(IDEBus *bus, ISADevice *dev, return ret; } + +void ide_bus_init_ioport(IDEBus *bus, Object *owner, MemoryRegion *io, + int iobase, int iobase2) +{ + portio_list_init(&bus->portio_list, owner, ide_portio_list, bus, "ide"); + portio_list_add(&bus->portio_list, io, iobase); + + portio_list_init(&bus->portio2_list, owner, ide_portio2_list, bus, "ide"); + portio_list_add(&bus->portio_list, io, iobase2); +} diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index d3b7fdc504..6967ca13e0 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -617,6 +617,8 @@ int ide_init_drive(IDEState *s, BlockBackend *blk, IDEDriveKind kind, uint32_t cylinders, uint32_t heads, uint32_t secs, int chs_trans, Error **errp); void ide_exit(IDEState *s); +void ide_bus_init_ioport(IDEBus *bus, Object *owner, MemoryRegion *io, + int iobase, int iobase2); void ide_bus_init_output_irq(IDEBus *bus, qemu_irq irq_out); void ide_bus_set_irq(IDEBus *bus); void ide_bus_register_restart_cb(IDEBus *bus);