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Mon, 27 Feb 2023 06:12:14 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PULL 120/126] hw/ide/pci: Add PCIIDEState::isa_irq[] Date: Mon, 27 Feb 2023 15:02:07 +0100 Message-Id: <20230227140213.35084-111-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230227140213.35084-1-philmd@linaro.org> References: <20230227140213.35084-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bernhard Beschow These legacy ISA IRQs allow the PIIX IDE functions to be wired up in their south bridges and the VIA IDE functions to disuse PCI_INTERRUPT_LINE as outlined in https://lists.nongnu.org/archive/html/qemu-devel/2020-03/msg01707.html Suggested-by: Mark Cave-Ayland Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20230126211740.66874-7-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/ide/pci.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/hw/ide/pci.h b/include/hw/ide/pci.h index 7b5e3f6e1c..74c127e32f 100644 --- a/include/hw/ide/pci.h +++ b/include/hw/ide/pci.h @@ -49,6 +49,7 @@ struct PCIIDEState { IDEBus bus[2]; BMDMAState bmdma[2]; + qemu_irq isa_irq[2]; uint32_t secondary; /* used only for cmd646 */ MemoryRegion bmdma_bar; MemoryRegion cmd_bar[2];