From patchwork Thu Feb 16 14:23:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 654042 Delivered-To: patch@linaro.org Received: by 2002:adf:f90f:0:0:0:0:0 with SMTP id b15csp381728wrr; Thu, 16 Feb 2023 06:26:01 -0800 (PST) X-Google-Smtp-Source: AK7set/fbibV2cTmcWw/tTN0ray3Kv7sDjQJRaImFePstxJ/YRFXdOspME7P0mdBw7k0Yi3LymVy X-Received: by 2002:ac8:5f12:0:b0:3b8:61df:1c0 with SMTP id x18-20020ac85f12000000b003b861df01c0mr10428265qta.59.1676557561044; Thu, 16 Feb 2023 06:26:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1676557561; cv=none; d=google.com; s=arc-20160816; b=HrWOB5Ul8kQchXksEYTbWGA9Zxz5GOvhgSgY12iA/r3TKrcPnEWqZscqha+e/z+oE/ oVemsbmhcxplKkPfMX7B+z6jC1Vazq32ppuYO/tIi2Y7eEBFzjzVhM6iGwluLc7XpGF+ j9n4vKFV97FZ0EBjiGDJiW7JZZovHWGzt4mb5oHjJfjLZ/o4t0O3fi2VPTC4nzP1oQPc GTVg8jyHKW8R6P1ziROgJiSkg9YrbFWnfxi6ZAg53vTe8dvWrhb27m5C8eJEZ6SYlDKK DFt9l+/4psV057Wtwvhyzq8s/kMI1uZ6KRgqJpu1JzTFFTOah5loc2nnpzyYusO+4HxP /HfA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=JNh8xTJOWod+s7ucBgmNWDci6dZ45Cp+WXSSHvSLoZ8=; b=kzHcxP5hJKwovwgC/d/QU2OqyhOJoAQn4zBCHfiVoAYQpwv2lzGK/nFXX1TF9//pMa O4//kg1Azr6AxbFWE9mZyF1QSBA7vCcjravQ8JzRdtAe0r740u1P6WTaBX7u1kU7W1O7 /PfVrbmU4t0mmp7aPMTLKsEHHwPdyDV4T1gKVZxwFn919ujc1nOHV7G6pTfUDHztwU/r GYJrm0HX+l5RgFoYnVJA7G2KKLIEAU3Xdlax8Tc3Q/HtNPxoVaJWV6hyFOcEABbT9cG1 lIE7BfgDZ0aRxrKa5bY/cDBJVMJwkK40up/OKKxvru/Zrsw5ntD/XFlQXAv92kab6FZE 2Nqg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tiUpkAAc; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 10-20020ac8574a000000b003b62c88b4ebsi1688635qtx.81.2023.02.16.06.26.00 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 16 Feb 2023 06:26:01 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tiUpkAAc; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pSfAu-0005cm-F2; Thu, 16 Feb 2023 09:23:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pSfAt-0005c3-2c for qemu-devel@nongnu.org; Thu, 16 Feb 2023 09:23:51 -0500 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pSfAp-00079u-Uz for qemu-devel@nongnu.org; Thu, 16 Feb 2023 09:23:50 -0500 Received: by mail-wm1-x336.google.com with SMTP id he5so1685699wmb.3 for ; Thu, 16 Feb 2023 06:23:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JNh8xTJOWod+s7ucBgmNWDci6dZ45Cp+WXSSHvSLoZ8=; b=tiUpkAAcnadyQJ+dVkubzde61bStnA0Kbi3UuyGWDQtEL6yLFqrBOH0YNEIXCeG2/M Y0ImUy3irOA9xnWN7wtRCpZ9wvqkgEm0ktfjlLCPHuXbNuuM03m9noxAnscZp7byCftz /vR0ZVULZUZbxg4dVuJP1WA4lJ04y4gUMi6fmzg4dCoa++Ir2Itb6A4Z06NG3iORGtCh 24xIw7Hih7PmTbInUMPTtmACsstE5YJ2d8lhm6J54YzCr0gg0lxImnFJ193b3I9YRal7 07/NOPhzbMMaFH9DORST7s/FRijumX0Ze217GCFHSxg12cxUcDCnKZ7n51Y15njjuil2 RwUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JNh8xTJOWod+s7ucBgmNWDci6dZ45Cp+WXSSHvSLoZ8=; b=JoW4DFE4ultKkx3mGU2FjCGGsipRWTVhU90LWem4CtcZftjr5xbDZLxr/KaC/2Sj8Q diiXCJyznZTEfIlEI4sfJOcaIUn4BW2BD3axTGCp8Ufw42kFvUHzCsbaB1SsV5LyMQML 4WK3JaOSDo7maZE/tXsDTO+Km1SJw4LOUq/K/XNuPmF/5AsoqNzbk5lRpEKcWOGrhv3C puxUcdZByFjs2mlsteOJA/uutMIW2pDUy0qxjT6MMT9VI8WkULpCgMda1ex0Mi5bEbqS Vtv3ZzbSjBfVu6rEaT3DdBbWF5odwhbVLlV3Ja3M9GgQabg0SUce8WD6l0xVIqsvzJNe 8JQQ== X-Gm-Message-State: AO0yUKUiOVDM5oVtqL5Mkse0Rx3m0MpM8DKmGijyoQeKFZdFgC0C3jR+ cQofrgJByEHc/PRXVdLmPdo3P2nvaoUsyjgh X-Received: by 2002:a05:600c:91d:b0:3e2:668:3ed7 with SMTP id m29-20020a05600c091d00b003e206683ed7mr3871662wmp.1.1676557426291; Thu, 16 Feb 2023 06:23:46 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id p15-20020a7bcdef000000b003e21356bddcsm1966221wmj.33.2023.02.16.06.23.44 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 16 Feb 2023 06:23:45 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Dapeng Mi , Sean Christopherson , Bin Meng , Zhuocheng Ding , =?utf-8?q?Alex_Benn=C3=A9e?= , Zhenyu Wang , qemu-riscv@nongnu.org, Alistair Francis , Zhao Liu , "Edgar E. Iglesias" , Paolo Bonzini , Marcel Apfelbaum , Robert Hoo , Yanan Wang , qemu-arm@nongnu.org, Peter Maydell , =?utf-8?q?Ph?= =?utf-8?q?ilippe_Mathieu-Daud=C3=A9?= , Palmer Dabbelt , Like Xu , Alistair Francis , Zhao Liu , Eduardo Habkost Subject: [PATCH 1/5] hw/cpu: Extend CPUState::cluster_index documentation Date: Thu, 16 Feb 2023 15:23:34 +0100 Message-Id: <20230216142338.82982-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230216142338.82982-1-philmd@linaro.org> References: <20230216142338.82982-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Copy part of the description of commit f7b78602fd ("accel/tcg: Add cluster number to TCG TB hash") in tcg_cpu_init_cflags(), improving a bit CPUState::cluster_index documentation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell --- accel/tcg/tcg-accel-ops.c | 13 ++++++++++++- include/hw/core/cpu.h | 2 ++ 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 19cbf1db3a..654aeec04c 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -44,7 +44,18 @@ void tcg_cpu_init_cflags(CPUState *cpu, bool parallel) { - uint32_t cflags = cpu->cluster_index << CF_CLUSTER_SHIFT; + uint32_t cflags; + + /* + * Include the cluster number in the hash we use to look up TBs. + * This is important because a TB that is valid for one cluster at + * a given physical address and set of CPU flags is not necessarily + * valid for another: + * the two clusters may have different views of physical memory, or + * may have different CPU features (eg FPU present or absent). + */ + cflags = cpu->cluster_index << CF_CLUSTER_SHIFT; + cflags |= parallel ? CF_PARALLEL : 0; cflags |= icount_enabled() ? CF_USE_ICOUNT : 0; cpu->tcg_cflags = cflags; diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 2417597236..d427db0bc7 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -272,6 +272,8 @@ struct qemu_work_item; * to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will * be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER * QOM parent. + * Under TCG this value is propagated to @tcg_cflags. + * See TranslationBlock::TCG CF_CLUSTER_MASK. * @tcg_cflags: Pre-computed cflags for this cpu. * @nr_cores: Number of cores within this CPU package. * @nr_threads: Number of threads within this CPU.