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([2602:47:d48c:8101:158e:facf:7a46:ba9f]) by smtp.gmail.com with ESMTPSA id l2-20020a17090a384200b0022727d4af8dsm577574pjf.48.2023.01.09.12.08.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Jan 2023 12:08:32 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Ilya Leoshkevich Subject: [PATCH v3 10/27] target/s390x: Use gen_psw_addr_disp in pc_to_link_info Date: Mon, 9 Jan 2023 12:08:02 -0800 Message-Id: <20230109200819.3916395-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230109200819.3916395-1-richard.henderson@linaro.org> References: <20230109200819.3916395-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org This is slightly more complicated than a straight displacement for 31 and 24-bit modes. Dont bother with a cant-happen assert. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index fadb87ad4a..05a11df00e 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -176,17 +176,20 @@ static void gen_psw_addr_disp(DisasContext *s, TCGv_i64 dest, int64_t disp) static void pc_to_link_info(TCGv_i64 out, DisasContext *s) { - uint64_t pc = s->pc_tmp; + TCGv_i64 tmp; - if (s->base.tb->flags & FLAG_MASK_32) { - if (s->base.tb->flags & FLAG_MASK_64) { - tcg_gen_movi_i64(out, pc); - return; - } - pc |= 0x80000000; + if (s->base.tb->flags & FLAG_MASK_64) { + gen_psw_addr_disp(s, out, s->ilen); + return; } - assert(!(s->base.tb->flags & FLAG_MASK_64)); - tcg_gen_deposit_i64(out, out, tcg_constant_i64(pc), 0, 32); + + tmp = tcg_temp_new_i64(); + gen_psw_addr_disp(s, tmp, s->ilen); + if (s->base.tb->flags & FLAG_MASK_32) { + tcg_gen_ori_i64(tmp, tmp, 0x80000000); + } + tcg_gen_deposit_i64(out, out, tmp, 0, 32); + tcg_temp_free_i64(tmp); } static TCGv_i64 psw_addr;