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Tsirkin" , Bin Meng , Max Filippov , Aurelien Jarno , Eduardo Habkost , Palmer Dabbelt , Radoslaw Biernacki , Jiaxun Yang , "Edgar E. Iglesias" , Xiaojuan Yang , Peter Maydell , qemu-block@nongnu.org, qemu-riscv@nongnu.org, Yoshinori Sato , Alistair Francis , qemu-arm@nongnu.org, Leif Lindholm , Kevin Wolf Subject: [PATCH 13/20] hw/ppc: Open-code pflash_cfi01_register() Date: Wed, 4 Jan 2023 23:04:42 +0100 Message-Id: <20230104220449.41337-14-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230104220449.41337-1-philmd@linaro.org> References: <20230104220449.41337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pflash_cfi01_register() hides an implicit sysbus mapping of MMIO region #0. This is not practical in a heterogeneous world where multiple cores use different address spaces. In order to remove to remove pflash_cfi01_register() from the pflash API, open-code it as a qdev creation call followed by an explicit sysbus mapping. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/ppc/sam460ex.c | 12 ++++++++---- hw/ppc/virtex_ml507.c | 7 ++++--- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index 4a22ce3761..a82c9e0642 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -82,6 +82,8 @@ struct boot_info { static int sam460ex_load_uboot(void) { + DeviceState *dev; + /* * This first creates 1MiB of flash memory mapped at the end of * the 32-bit address space (0xFFF00000..0xFFFFFFFF). @@ -103,14 +105,16 @@ static int sam460ex_load_uboot(void) DriveInfo *dinfo; dinfo = drive_get(IF_PFLASH, 0, 0); - if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32), - "sam460ex.flash", FLASH_SIZE, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1)) { + dev = pflash_cfi01_create("sam460ex.flash", FLASH_SIZE, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); + if (!dev) { error_report("Error registering flash memory"); /* XXX: return an error instead? */ exit(1); } + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, + FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32)); if (!dinfo) { /*error_report("No flash image given with the 'pflash' parameter," diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index f2f81bd425..ee211664a8 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -233,9 +233,10 @@ static void virtex_init(MachineState *machine) memory_region_add_subregion(address_space_mem, ram_base, machine->ram); dinfo = drive_get(IF_PFLASH, 0, 0); - pflash_cfi01_register(PFLASH_BASEADDR, "virtex.flash", FLASH_SIZE, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); + dev = pflash_cfi01_create("virtex.flash", FLASH_SIZE, + dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, + 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, PFLASH_BASEADDR); cpu_irq = qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT); dev = qdev_new("xlnx.xps-intc");