diff mbox series

[RFC,27/40] target/arm: Split out strongarm_class_init

Message ID 20230103181646.55711-28-richard.henderson@linaro.org
State New
Headers show
Series Toward class init of cpu features | expand

Commit Message

Richard Henderson Jan. 3, 2023, 6:16 p.m. UTC 
Use an intermediate function to share code between
sa1100_class_init and sa1110_class_init.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/cpu_tcg.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

Comments

Philippe Mathieu-Daudé Jan. 5, 2023, 10:12 p.m. UTC | #1 
On 3/1/23 19:16, Richard Henderson wrote:
> Use an intermediate function to share code between
> sa1100_class_init and sa1110_class_init.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/arm/cpu_tcg.c | 15 +++++++++------
>   1 file changed, 9 insertions(+), 6 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
diff mbox series

Patch

diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
index 1ef825b39e..c6d50f326e 100644
--- a/target/arm/cpu_tcg.c
+++ b/target/arm/cpu_tcg.c
@@ -837,21 +837,24 @@  static void ti925t_class_init(ARMCPUClass *acc)
     acc->reset_sctlr = 0x00000070;
 }
 
-static void sa1100_class_init(ARMCPUClass *acc)
+static void strongarm_class_init(ARMCPUClass *acc)
 {
-    acc->dtb_compatible = "intel,sa1100";
     set_class_feature(acc, ARM_FEATURE_STRONGARM);
     set_class_feature(acc, ARM_FEATURE_DUMMY_C15_REGS);
-    acc->midr = 0x4401A11B;
     acc->reset_sctlr = 0x00000070;
 }
 
+static void sa1100_class_init(ARMCPUClass *acc)
+{
+    strongarm_class_init(acc);
+    acc->dtb_compatible = "intel,sa1100";
+    acc->midr = 0x4401A11B;
+}
+
 static void sa1110_class_init(ARMCPUClass *acc)
 {
-    set_class_feature(acc, ARM_FEATURE_STRONGARM);
-    set_class_feature(acc, ARM_FEATURE_DUMMY_C15_REGS);
+    strongarm_class_init(acc);
     acc->midr = 0x6901B119;
-    acc->reset_sctlr = 0x00000070;
 }
 
 static void pxa250_class_init(ARMCPUClass *acc)