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[209.51.188.17]) by mx.google.com with ESMTPS id r6-20020ac85e86000000b003a53ae2db4esi7668475qtx.721.2022.12.29.07.27.23 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 29 Dec 2022 07:27:23 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HXSpfGpy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pAuky-0001EZ-Bv; Thu, 29 Dec 2022 10:23:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pAukw-0001Do-Ok for qemu-devel@nongnu.org; Thu, 29 Dec 2022 10:23:42 -0500 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pAukv-0007qp-7e for qemu-devel@nongnu.org; Thu, 29 Dec 2022 10:23:42 -0500 Received: by mail-wr1-x42c.google.com with SMTP id h16so17638919wrz.12 for ; Thu, 29 Dec 2022 07:23:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QdQ1jhSiAeTlE9odBywW4XFvZU5ijZarJfBTLLFf7vU=; b=HXSpfGpy1aFSVbilt9b4Olo6JiuHd8pS9IuiqUDKHj8nlHDfOwPiASwRCSWFlS3AIF Dp/eF5Six5956/LAi++jBk418gD3mSHnxdpj0SVGp6pW1q/44+Th9bgDyizN9mAllFur bAnkGBhUXs4npphtYW+nzfqipE9YW6yXjqdMmTI3mxqBjzqpvKaQF6b9yhsUceqZpC5/ AfoXU/4P9kW/5ZdfizBM1XGZYJuaw68/owlHWESEynidHipNYjrF7E1Z+hPsvxzkZtIu JVbbvIk7j0CkxP1xYxtsoIRzLRuOfng+vuwizLlXNTckLs0+sQ4OFiRG02+p+12u+QsT 73cA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QdQ1jhSiAeTlE9odBywW4XFvZU5ijZarJfBTLLFf7vU=; b=bhlDEc8b8lL+dPaGDKralQ6eGTFtIbvY7kAqyJjvlcbZQrBui4G4knHPXsTcXE0FE1 356xikxBuAwaN+DZhlwrSYrCbbrLCzHC4SK0KeKRIdJE2syBqi8lRrfa49Hds9enoB83 3jKcT7G07b0KJgU8QtaHzw2/Gsk6tagU4tTToJsRx4H4RiDY3vQgraUGck9akLkDBi64 12CVwKPo6szUjRviRgl0UVZDY+pt9VY9yDonMnV6tzXm4oDxTl8u21kQt9q+34Oj63pW tA8zYdDb5dVlknw0L4qZN28qOiOgjwJGFWDSRBM3LQXb3ZtH/u2zuKglR4R7Ti8U54YS XNag== X-Gm-Message-State: AFqh2kq6oKBNgkLeX/M5I5AiuiHIWujCfwEWRpah1icOgNlO+30579Zk MjNybA8DobtvPTKBviRwd6ZPowXJ+dFYG0pp X-Received: by 2002:a5d:4008:0:b0:242:17d3:a9fc with SMTP id n8-20020a5d4008000000b0024217d3a9fcmr17708689wrp.30.1672327419544; Thu, 29 Dec 2022 07:23:39 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id l17-20020a056000023100b00241fab5a296sm18123222wrz.40.2022.12.29.07.23.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 29 Dec 2022 07:23:39 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Steven Lee , Peter Delevoryas , Peter Delevoryas , qemu-arm@nongnu.org, Cleber Rosa , Peter Maydell , Beraldo Leal , Wainer dos Santos Moschetta , Troy Lee , Andrew Jeffery , Joel Stanley , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Peter Delevoryas , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Jamin Lin Subject: [PATCH 2/9] hw/arm/aspeed: Use the IEC binary prefix definitions Date: Thu, 29 Dec 2022 16:23:18 +0100 Message-Id: <20221229152325.32041-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221229152325.32041-1-philmd@linaro.org> References: <20221229152325.32041-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org IEC binary prefixes ease code review: the unit is explicit. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Delevoryas --- hw/arm/aspeed_ast10x0.c | 3 ++- hw/arm/aspeed_ast2600.c | 3 ++- hw/arm/aspeed_soc.c | 4 ++-- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index 122b3fd3f3..3500294df7 100644 --- a/hw/arm/aspeed_ast10x0.c +++ b/hw/arm/aspeed_ast10x0.c @@ -10,6 +10,7 @@ */ #include "qemu/osdep.h" +#include "qemu/units.h" #include "qapi/error.h" #include "exec/address-spaces.h" #include "sysemu/sysemu.h" @@ -348,7 +349,7 @@ static void aspeed_soc_ast1030_class_init(ObjectClass *klass, void *data) sc->name = "ast1030-a1"; sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-m4"); sc->silicon_rev = AST1030_A1_SILICON_REV; - sc->sram_size = 0xc0000; + sc->sram_size = 768 * KiB; sc->spis_num = 2; sc->ehcis_num = 0; sc->wdts_num = 4; diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index a79e05ddbd..72df72a540 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -8,6 +8,7 @@ */ #include "qemu/osdep.h" +#include "qemu/units.h" #include "qapi/error.h" #include "hw/misc/unimp.h" #include "hw/arm/aspeed_soc.h" @@ -619,7 +620,7 @@ static void aspeed_soc_ast2600_class_init(ObjectClass *oc, void *data) sc->name = "ast2600-a3"; sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"); sc->silicon_rev = AST2600_A3_SILICON_REV; - sc->sram_size = 0x16400; + sc->sram_size = 89 * KiB; sc->spis_num = 2; sc->ehcis_num = 2; sc->wdts_num = 4; diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 2c0924d311..677342c9ed 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -517,7 +517,7 @@ static void aspeed_soc_ast2400_class_init(ObjectClass *oc, void *data) sc->name = "ast2400-a1"; sc->cpu_type = ARM_CPU_TYPE_NAME("arm926"); sc->silicon_rev = AST2400_A1_SILICON_REV; - sc->sram_size = 0x8000; + sc->sram_size = 32 * KiB; sc->spis_num = 1; sc->ehcis_num = 1; sc->wdts_num = 2; @@ -544,7 +544,7 @@ static void aspeed_soc_ast2500_class_init(ObjectClass *oc, void *data) sc->name = "ast2500-a1"; sc->cpu_type = ARM_CPU_TYPE_NAME("arm1176"); sc->silicon_rev = AST2500_A1_SILICON_REV; - sc->sram_size = 0x9000; + sc->sram_size = 36 * KiB; sc->spis_num = 2; sc->ehcis_num = 2; sc->wdts_num = 3;