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[209.51.188.17]) by mx.google.com with ESMTPS id w15-20020a05620a424f00b006fbb4b98a17si5176430qko.222.2022.12.20.03.30.01 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Dec 2022 03:30:01 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OU5BSyF0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p7aXK-0004DA-ES; Tue, 20 Dec 2022 06:11:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p7aXH-00049p-T7 for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:11:52 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p7aXF-0003gq-OH for qemu-devel@nongnu.org; Tue, 20 Dec 2022 06:11:51 -0500 Received: by mail-wr1-x42a.google.com with SMTP id y16so11411597wrm.2 for ; Tue, 20 Dec 2022 03:11:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=e1KLjwcpkRpHkyHTd4A9nwCZS64HWEF8CTuzylI9ZoM=; b=OU5BSyF04QdnicIifhGADL+Gj7OWykvfKE3UcoqFvYYSFMjqR2IUM/yRNKMXN6sxpn r78EBMvrw0gUCLrT/3KVyldKeU5wfGwL+qhlW6c+7rJnE/EcCn4fruHOWbgpse9w8niN rXr9pCw5R2Ekc4+277RsUUrVNrUw43ll5R4jIgdK7ATHawPwmhlvjckpatAY3pnRZedy Uh+shMiYgZbFHD/PQnmWV7DXfqr5p5jZSDftAj6UXkWJx4D2ZSIykbVbJXlHcmRdWQ7j 7SdKIkhKs5+98gCj8sOqIoaiqz++0URWTwYgCF0ys0ySZk25sY/fij4lKZYUAEXm95VM HUrg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=e1KLjwcpkRpHkyHTd4A9nwCZS64HWEF8CTuzylI9ZoM=; b=hRFMyovl6jwAOxpF74OZBoNq2E/Aja4/CD8DWmI4ugTvv89riyvaZZ8jIIli9OisVp Jb+MkisSOkXO3u/tyTI6kFJyoTsXZa/6fYWqL5qk5b9l9LPtoZiemMjQ5VbjOwfK5V7B hbLDcTf/kLGymoNn1DsAgSVcJqn9QWj0e5ef/7NzyWfwKkkwSdT591wnoZ5BBPwNMo5g al+spjiDbkMaOFXN2BZJnt+QeIcYkOy/NBZuvo0VukPbDaKSgJtA3P0mhT6S1xLSO2RT +uMqViu4xvn9lCrrtFFn7kX9MZEePLQ0INRzI4F1U4jR9MPd/tBz2plNX3Qx2CtebE6V 5Oqw== X-Gm-Message-State: AFqh2kpIwT5+kdJZs/Kk3jStVp2EBtXga7ahLO3+gBNvHRg59/hM2AwJ FwxcnKY4yUd5fBRRTPdEaF6LSmfztv7WuXAJU6c= X-Received: by 2002:adf:f6c2:0:b0:242:144:90c4 with SMTP id y2-20020adff6c2000000b00242014490c4mr1053505wrp.28.1671534708756; Tue, 20 Dec 2022 03:11:48 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id az29-20020adfe19d000000b0024246991121sm12422027wrb.116.2022.12.20.03.11.46 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 20 Dec 2022 03:11:48 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, =?utf-8?q?C=C3=A9dric_Le_Goater?= , Peter Maydell , Greg Kurz , Daniel Henrique Barboza , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Xiaojuan Yang , Aurelien Jarno , Huacai Chen , Aleksandar Rikalo , qemu-arm@nongnu.org, David Gibson , Jiaxun Yang , Markus Armbruster , Song Gao , Richard Henderson Subject: [PATCH RESEND v2 4/5] target/mips: Restrict 'qapi-commands-machine.h' to system emulation Date: Tue, 20 Dec 2022 12:11:21 +0100 Message-Id: <20221220111122.8966-5-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221220111122.8966-1-philmd@linaro.org> References: <20221220111122.8966-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since commit a0e61807a3 ("qapi: Remove QMP events and commands from user-mode builds") we don't generate the "qapi-commands-machine.h" header in a user-emulation-only build. Extract the QMP functions from cpu.c (which is always compiled) to the new 'sysemu/monitor.c' unit (which is only compiled when system emulation is selected). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/mips/cpu.c | 29 ------------------------- target/mips/sysemu/meson.build | 1 + target/mips/sysemu/monitor.c | 39 ++++++++++++++++++++++++++++++++++ 3 files changed, 40 insertions(+), 29 deletions(-) create mode 100644 target/mips/sysemu/monitor.c diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 7a565466cb..7a37123419 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -32,7 +32,6 @@ #include "hw/qdev-properties.h" #include "hw/qdev-clock.h" #include "semihosting/semihost.h" -#include "qapi/qapi-commands-machine-target.h" #include "fpu_helper.h" const char regnames[32][3] = { @@ -627,34 +626,6 @@ static void mips_cpu_register_types(void) type_init(mips_cpu_register_types) -static void mips_cpu_add_definition(gpointer data, gpointer user_data) -{ - ObjectClass *oc = data; - CpuDefinitionInfoList **cpu_list = user_data; - CpuDefinitionInfo *info; - const char *typename; - - typename = object_class_get_name(oc); - info = g_malloc0(sizeof(*info)); - info->name = g_strndup(typename, - strlen(typename) - strlen("-" TYPE_MIPS_CPU)); - info->q_typename = g_strdup(typename); - - QAPI_LIST_PREPEND(*cpu_list, info); -} - -CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) -{ - CpuDefinitionInfoList *cpu_list = NULL; - GSList *list; - - list = object_class_get_list(TYPE_MIPS_CPU, false); - g_slist_foreach(list, mips_cpu_add_definition, &cpu_list); - g_slist_free(list); - - return cpu_list; -} - /* Could be used by generic CPU object */ MIPSCPU *mips_cpu_create_with_clock(const char *cpu_type, Clock *cpu_refclk) { diff --git a/target/mips/sysemu/meson.build b/target/mips/sysemu/meson.build index cefc227582..0e424c9cc6 100644 --- a/target/mips/sysemu/meson.build +++ b/target/mips/sysemu/meson.build @@ -3,5 +3,6 @@ mips_softmmu_ss.add(files( 'cp0.c', 'cp0_timer.c', 'machine.c', + 'monitor.c', 'physaddr.c', )) diff --git a/target/mips/sysemu/monitor.c b/target/mips/sysemu/monitor.c new file mode 100644 index 0000000000..6db4626412 --- /dev/null +++ b/target/mips/sysemu/monitor.c @@ -0,0 +1,39 @@ +/* + * QEMU MIPS CPU (monitor definitions) + * + * SPDX-FileCopyrightText: 2012 SUSE LINUX Products GmbH + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/qapi-commands-machine-target.h" +#include "cpu.h" + +static void mips_cpu_add_definition(gpointer data, gpointer user_data) +{ + ObjectClass *oc = data; + CpuDefinitionInfoList **cpu_list = user_data; + CpuDefinitionInfo *info; + const char *typename; + + typename = object_class_get_name(oc); + info = g_malloc0(sizeof(*info)); + info->name = g_strndup(typename, + strlen(typename) - strlen("-" TYPE_MIPS_CPU)); + info->q_typename = g_strdup(typename); + + QAPI_LIST_PREPEND(*cpu_list, info); +} + +CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp) +{ + CpuDefinitionInfoList *cpu_list = NULL; + GSList *list; + + list = object_class_get_list(TYPE_MIPS_CPU, false); + g_slist_foreach(list, mips_cpu_add_definition, &cpu_list); + g_slist_free(list); + + return cpu_list; +}