| Message ID | 20221111074101.2069454-41-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | tcg: Support for Int128 with helpers | expand |
On 11/11/22 04:40, Richard Henderson wrote: > Fill in the parameters for the host ABI for Int128 for > those backends which require no extra modification. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> > tcg/aarch64/tcg-target.h | 2 ++ > tcg/arm/tcg-target.h | 2 ++ > tcg/loongarch64/tcg-target.h | 2 ++ > tcg/mips/tcg-target.h | 2 ++ > tcg/riscv/tcg-target.h | 3 +++ > tcg/s390x/tcg-target.h | 2 ++ > tcg/sparc64/tcg-target.h | 2 ++ > tcg/tcg.c | 6 +++--- > tcg/ppc/tcg-target.c.inc | 3 +++ > 9 files changed, 21 insertions(+), 3 deletions(-) > > diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h > index 413a5410c5..0dff5807f6 100644 > --- a/tcg/aarch64/tcg-target.h > +++ b/tcg/aarch64/tcg-target.h > @@ -54,6 +54,8 @@ typedef enum { > #define TCG_TARGET_CALL_STACK_OFFSET 0 > #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL > #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL > +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL > +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL > > /* optional instructions */ > #define TCG_TARGET_HAS_div_i32 1 > diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h > index b7843d2d54..6613d3d791 100644 > --- a/tcg/arm/tcg-target.h > +++ b/tcg/arm/tcg-target.h > @@ -91,6 +91,8 @@ extern bool use_neon_instructions; > #define TCG_TARGET_CALL_STACK_OFFSET 0 > #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL > #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN > +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_EVEN > +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_BY_REF > > /* optional instructions */ > #define TCG_TARGET_HAS_ext8s_i32 1 > diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h > index e5f7a1f09d..9d0db8fdfe 100644 > --- a/tcg/loongarch64/tcg-target.h > +++ b/tcg/loongarch64/tcg-target.h > @@ -95,6 +95,8 @@ typedef enum { > #define TCG_TARGET_CALL_STACK_OFFSET 0 > #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL > #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL > +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL > +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL > > /* optional instructions */ > #define TCG_TARGET_HAS_movcond_i32 0 > diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h > index 15721c3e42..b235cba8ba 100644 > --- a/tcg/mips/tcg-target.h > +++ b/tcg/mips/tcg-target.h > @@ -89,6 +89,8 @@ typedef enum { > # define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL > #endif > #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL > +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_EVEN > +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL > > /* MOVN/MOVZ instructions detection */ > #if (defined(__mips_isa_rev) && (__mips_isa_rev >= 1)) || \ > diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h > index 232537ccea..d61ca902d3 100644 > --- a/tcg/riscv/tcg-target.h > +++ b/tcg/riscv/tcg-target.h > @@ -85,9 +85,12 @@ typedef enum { > #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL > #if TCG_TARGET_REG_BITS == 32 > #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN > +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_EVEN > #else > #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL > +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL > #endif > +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL > > /* optional instructions */ > #define TCG_TARGET_HAS_movcond_i32 0 > diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h > index db5665c375..9a3856f0b3 100644 > --- a/tcg/s390x/tcg-target.h > +++ b/tcg/s390x/tcg-target.h > @@ -168,6 +168,8 @@ extern uint64_t s390_facilities[3]; > #define TCG_TARGET_CALL_STACK_OFFSET 160 > #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_EXTEND > #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_RET_NORMAL > +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_BY_REF > +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_BY_REF > > #define TCG_TARGET_HAS_MEMORY_BSWAP 1 > > diff --git a/tcg/sparc64/tcg-target.h b/tcg/sparc64/tcg-target.h > index 0044ac8d78..53cfa843da 100644 > --- a/tcg/sparc64/tcg-target.h > +++ b/tcg/sparc64/tcg-target.h > @@ -73,6 +73,8 @@ typedef enum { > #define TCG_TARGET_CALL_STACK_OFFSET (128 + 6*8 + TCG_TARGET_STACK_BIAS) > #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_EXTEND > #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL > +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL > +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL > > #if defined(__VIS__) && __VIS__ >= 0x300 > #define use_vis3_instructions 1 > diff --git a/tcg/tcg.c b/tcg/tcg.c > index 9dd194a2f2..5465297495 100644 > --- a/tcg/tcg.c > +++ b/tcg/tcg.c > @@ -743,8 +743,8 @@ static void init_call_layout(TCGHelperInfo *info) > break; > case dh_typecode_i128: > info->nr_out = 128 / TCG_TARGET_REG_BITS; > - info->out_kind = TCG_CALL_RET_NORMAL; /* TODO */ > - switch (/* TODO */ TCG_CALL_RET_NORMAL) { > + info->out_kind = TCG_TARGET_CALL_RET_I128; > + switch (TCG_TARGET_CALL_RET_I128) { > case TCG_CALL_RET_NORMAL: > /* Query the last register now to trigger any assert early. */ > tcg_target_call_oarg_reg(info->out_kind, info->nr_out - 1); > @@ -815,7 +815,7 @@ static void init_call_layout(TCGHelperInfo *info) > layout_arg_1(&cum, info, TCG_CALL_ARG_NORMAL); > break; > case dh_typecode_i128: > - switch (/* TODO */ TCG_CALL_ARG_NORMAL) { > + switch (TCG_TARGET_CALL_ARG_I128) { > case TCG_CALL_ARG_EVEN: > layout_arg_even(&cum); > /* fall through */ > diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc > index 781ecfe161..e86d4a5e78 100644 > --- a/tcg/ppc/tcg-target.c.inc > +++ b/tcg/ppc/tcg-target.c.inc > @@ -54,6 +54,9 @@ > #else > # define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL > #endif > +/* Note sysv arg alignment applies only to 2-word types, not more. */ > +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL > +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL > > /* For some memory operations, we need a scratch that isn't R0. For the AIX > calling convention, we can re-use the TOC register since we'll be reloading
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index 413a5410c5..0dff5807f6 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -54,6 +54,8 @@ typedef enum { #define TCG_TARGET_CALL_STACK_OFFSET 0 #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL /* optional instructions */ #define TCG_TARGET_HAS_div_i32 1 diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index b7843d2d54..6613d3d791 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -91,6 +91,8 @@ extern bool use_neon_instructions; #define TCG_TARGET_CALL_STACK_OFFSET 0 #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_EVEN +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_BY_REF /* optional instructions */ #define TCG_TARGET_HAS_ext8s_i32 1 diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h index e5f7a1f09d..9d0db8fdfe 100644 --- a/tcg/loongarch64/tcg-target.h +++ b/tcg/loongarch64/tcg-target.h @@ -95,6 +95,8 @@ typedef enum { #define TCG_TARGET_CALL_STACK_OFFSET 0 #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL /* optional instructions */ #define TCG_TARGET_HAS_movcond_i32 0 diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index 15721c3e42..b235cba8ba 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -89,6 +89,8 @@ typedef enum { # define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL #endif #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_EVEN +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL /* MOVN/MOVZ instructions detection */ #if (defined(__mips_isa_rev) && (__mips_isa_rev >= 1)) || \ diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h index 232537ccea..d61ca902d3 100644 --- a/tcg/riscv/tcg-target.h +++ b/tcg/riscv/tcg-target.h @@ -85,9 +85,12 @@ typedef enum { #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL #if TCG_TARGET_REG_BITS == 32 #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_EVEN #else #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL #endif +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL /* optional instructions */ #define TCG_TARGET_HAS_movcond_i32 0 diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h index db5665c375..9a3856f0b3 100644 --- a/tcg/s390x/tcg-target.h +++ b/tcg/s390x/tcg-target.h @@ -168,6 +168,8 @@ extern uint64_t s390_facilities[3]; #define TCG_TARGET_CALL_STACK_OFFSET 160 #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_EXTEND #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_RET_NORMAL +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_BY_REF +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_BY_REF #define TCG_TARGET_HAS_MEMORY_BSWAP 1 diff --git a/tcg/sparc64/tcg-target.h b/tcg/sparc64/tcg-target.h index 0044ac8d78..53cfa843da 100644 --- a/tcg/sparc64/tcg-target.h +++ b/tcg/sparc64/tcg-target.h @@ -73,6 +73,8 @@ typedef enum { #define TCG_TARGET_CALL_STACK_OFFSET (128 + 6*8 + TCG_TARGET_STACK_BIAS) #define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_EXTEND #define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL #if defined(__VIS__) && __VIS__ >= 0x300 #define use_vis3_instructions 1 diff --git a/tcg/tcg.c b/tcg/tcg.c index 9dd194a2f2..5465297495 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -743,8 +743,8 @@ static void init_call_layout(TCGHelperInfo *info) break; case dh_typecode_i128: info->nr_out = 128 / TCG_TARGET_REG_BITS; - info->out_kind = TCG_CALL_RET_NORMAL; /* TODO */ - switch (/* TODO */ TCG_CALL_RET_NORMAL) { + info->out_kind = TCG_TARGET_CALL_RET_I128; + switch (TCG_TARGET_CALL_RET_I128) { case TCG_CALL_RET_NORMAL: /* Query the last register now to trigger any assert early. */ tcg_target_call_oarg_reg(info->out_kind, info->nr_out - 1); @@ -815,7 +815,7 @@ static void init_call_layout(TCGHelperInfo *info) layout_arg_1(&cum, info, TCG_CALL_ARG_NORMAL); break; case dh_typecode_i128: - switch (/* TODO */ TCG_CALL_ARG_NORMAL) { + switch (TCG_TARGET_CALL_ARG_I128) { case TCG_CALL_ARG_EVEN: layout_arg_even(&cum); /* fall through */ diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 781ecfe161..e86d4a5e78 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -54,6 +54,9 @@ #else # define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL #endif +/* Note sysv arg alignment applies only to 2-word types, not more. */ +#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL +#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL /* For some memory operations, we need a scratch that isn't R0. For the AIX calling convention, we can re-use the TOC register since we'll be reloading
Fill in the parameters for the host ABI for Int128 for those backends which require no extra modification. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- tcg/aarch64/tcg-target.h | 2 ++ tcg/arm/tcg-target.h | 2 ++ tcg/loongarch64/tcg-target.h | 2 ++ tcg/mips/tcg-target.h | 2 ++ tcg/riscv/tcg-target.h | 3 +++ tcg/s390x/tcg-target.h | 2 ++ tcg/sparc64/tcg-target.h | 2 ++ tcg/tcg.c | 6 +++--- tcg/ppc/tcg-target.c.inc | 3 +++ 9 files changed, 21 insertions(+), 3 deletions(-)