From patchwork Thu Oct 27 20:47:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 619231 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp555841pvb; Thu, 27 Oct 2022 13:49:42 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5Phhmxpysht8/BrE+aK/wqEwVabR6cBFs8J2X8dJbt5bC5yymAg0XT5VNbx19Pgy8xMTFP X-Received: by 2002:a05:622a:1313:b0:39c:ff31:21e0 with SMTP id v19-20020a05622a131300b0039cff3121e0mr10499815qtk.274.1666903782393; Thu, 27 Oct 2022 13:49:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666903782; cv=none; d=google.com; s=arc-20160816; b=zIJBKJkBz0cbxXToQU4nc0Kz8PQoLMr/qJS8kuUSQmfbuskOIyWLLdJ53CDJbfqfIN wrw1DugrgucVQbDTVAUmVBcCr03+ST6HcVVXYFx5St2rqqiL4e0qFal/3FS+uO+SudJj w6JDUmvl7ZKiQE1tAbEuWB2vGfn+qUg9IRQ+CXQJtz/Y+OMG6HIssXNsmkZLsSmdk5F+ j10n+OgpK2KCRsGUBYsk1Et0w/C7EIjSzXkSVqeMOt4OnnsrJYjQ2Yf6yYuRs0X0Kw/X ddnyHlDZenX5HfDSj4wPRTGi9xyfskIN/6brZtzfKxL1AX6U0FyBXhwOFJ6oMqYu8fZJ KwLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:sender:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=FideTTwLBlaM3Uj+ggSbpikD+Db2qX3oNiUh+CsQYlw=; b=s/YH+v9oj0oWATnq07Z18P7WZvXjjHK7PliV+MbzfJoeLno6JcZao3wUfxFjErXqKj W23dBzTMh4tXoCLIU73MNps2Zvm0JpE5K+TZ64PLiY6Q9cu2JC5d2hEbU52QjV4TDj3s iXqvGsX9DBCIox5bptrwF2fPptWuIR5/8zB1fFDcgtnqZTJM6pkYeqIfsbBoyEwqA9cW 8og4s9LszO6gynAED5MZsf6ZB7UwcYs6TlnQJGend5Kl1Wg9PfjgvQ7MQsMYqqqBpLmU Vuqokd1kAu4RtkDK1mimeuonERRQneYnGNRJFGWhtdkI3gPvDXm/KlWdVt7LUJOQaM7x FMAA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=y0anLze3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 190-20020a3705c7000000b006eb472451fcsi1511523qkf.113.2022.10.27.13.49.42 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 27 Oct 2022 13:49:42 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=y0anLze3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oo9nE-0003RU-KX; Thu, 27 Oct 2022 16:48:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oo9n1-0003He-Sx for qemu-devel@nongnu.org; Thu, 27 Oct 2022 16:47:55 -0400 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oo9my-0007VO-P2 for qemu-devel@nongnu.org; Thu, 27 Oct 2022 16:47:47 -0400 Received: by mail-wr1-x42b.google.com with SMTP id w14so4168089wru.8 for ; Thu, 27 Oct 2022 13:47:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FideTTwLBlaM3Uj+ggSbpikD+Db2qX3oNiUh+CsQYlw=; b=y0anLze37SuyGnx2X0R5zVokWIq4ZWzf/8hDyAr9+NGCdErnT7jiShtfbi7ZwT3Ray vMbSh5FaNi0txW1TTMkpEPqP1Lh0Jd5N7QDCRWzbLrWeVQLdNGcuphBYrW5EuePdbdXQ qoA0d44I1mkXqHe7mXBChByiZIUD/Wckigrnbw2ICVWPEN3bJ0/dbAkJKJDVNxwXKNPb Ilzv6PKu9saey7uxWIpeb6gKSGGD+Yqvq4k1wKb+V0EaSbcRfOz57YvVaofQsUYBH1gr JrgeiyFS3Vku+FUZFlNnbcRzE6d5aQYsnqh0cuR/o7RlWwGlR4kJqZJWVpjEVBhVWAZS C3eA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FideTTwLBlaM3Uj+ggSbpikD+Db2qX3oNiUh+CsQYlw=; b=JLgy73sI7XtkVTutIJCswZIfbWhBGZXmZre76z1jFNEkABgQ1+tT9gNNJaimOEcfvj Hr/UOAHFHol8lApPrFy85QC+//E2J+Z1tGP1KnXQQE+aSe53bicHpbFUEUsh8Og4CQm3 RIQ6/TK81GLdSjA1Bv6SL+oRx5+fS06Ih8lt40ydfUGgGbCtNaZM8xR8uEJmTYSmlyT+ uPIepkYLtrvrEYSNr4VWhbjYtiRpOwIB4t9fKq5ayPLYa3oMmMBsI2rS38ziWTDfQHYM nDQa0PDPL3su+Id/0zBImPVYW12THJCylQ4/25Q9OXExoM1t6y6+JizJ6aQkCf8DNsr2 lWcA== X-Gm-Message-State: ACrzQf2xk2O7x4ZHBaech2LqRoQBulUB0e/gbMjHt1ACY3vtSbp/jOhR z8h19RlMOhFM1aH+3f4eKf0ktjmZ3az4Ew1X X-Received: by 2002:a5d:69c2:0:b0:236:86fc:4400 with SMTP id s2-20020a5d69c2000000b0023686fc4400mr8513748wrw.69.1666903663218; Thu, 27 Oct 2022 13:47:43 -0700 (PDT) Received: from localhost.localdomain ([185.126.107.38]) by smtp.gmail.com with ESMTPSA id w7-20020adfd4c7000000b002362f6fcaf5sm1948159wrk.48.2022.10.27.13.47.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 27 Oct 2022 13:47:42 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Bernhard Beschow Cc: Jiaxun Yang , Aurelien Jarno , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , =?utf-8?q?Herv=C3=A9_Poussineau?= Subject: [PATCH v2 3/3] hw/isa/piix4: Correct IRQRC[A:D] reset values Date: Thu, 27 Oct 2022 22:47:20 +0200 Message-Id: <20221027204720.33611-4-philmd@linaro.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221027204720.33611-1-philmd@linaro.org> References: <20221027204720.33611-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org IRQRC[A:D] registers reset value is 0x80. We were forcing the MIPS Malta machine routing to be able to boot a Linux kernel without any bootloader. We now have these registers initialized in the Malta machine write_bootloader(), so we can use the correct reset values. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bernhard Beschow Reviewed-by: Igor Mammedov --- hw/isa/piix4.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 15f344dbb7..a2165c6a49 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -115,10 +115,10 @@ static void piix4_isa_reset(DeviceState *dev) pci_conf[0x4c] = 0x4d; pci_conf[0x4e] = 0x03; pci_conf[0x4f] = 0x00; - pci_conf[0x60] = 0x0a; // PCI A -> IRQ 10 - pci_conf[0x61] = 0x0a; // PCI B -> IRQ 10 - pci_conf[0x62] = 0x0b; // PCI C -> IRQ 11 - pci_conf[0x63] = 0x0b; // PCI D -> IRQ 11 + pci_conf[0x60] = 0x80; + pci_conf[0x61] = 0x80; + pci_conf[0x62] = 0x80; + pci_conf[0x63] = 0x80; pci_conf[0x69] = 0x02; pci_conf[0x70] = 0x80; pci_conf[0x76] = 0x0c;