diff mbox series

[v4,1/3] hw/mips/bootloader: Allow bl_gen_jump_kernel to optionally set register

Message ID 20221026191821.28167-2-philmd@linaro.org
State Accepted
Commit 36d7487b2aa033e9792fb310c39d106ffcadaa4f
Headers show
Series MIPS Bootloader helper | expand

Commit Message

Philippe Mathieu-Daudé Oct. 26, 2022, 7:18 p.m. UTC 
When one of the $sp/$a[0..3] register is already set, we might
want bl_gen_jump_kernel() to NOT set it again. Pass a boolean
argument for each register, to allow to optionally set them.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/mips/bootloader.c         | 28 +++++++++++++++++++++-------
 hw/mips/boston.c             |  5 ++++-
 hw/mips/fuloong2e.c          |  8 ++++++--
 include/hw/mips/bootloader.h |  8 ++++++--
 4 files changed, 37 insertions(+), 12 deletions(-)
diff mbox series

Patch

diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c
index 99991f8b2b..f5f42f2bf2 100644
--- a/hw/mips/bootloader.c
+++ b/hw/mips/bootloader.c
@@ -165,15 +165,29 @@  void bl_gen_jump_to(uint32_t **p, target_ulong jump_addr)
     bl_gen_nop(p); /* delay slot */
 }
 
-void bl_gen_jump_kernel(uint32_t **p, target_ulong sp, target_ulong a0,
-                        target_ulong a1, target_ulong a2, target_ulong a3,
+void bl_gen_jump_kernel(uint32_t **p,
+                        bool set_sp, target_ulong sp,
+                        bool set_a0, target_ulong a0,
+                        bool set_a1, target_ulong a1,
+                        bool set_a2, target_ulong a2,
+                        bool set_a3, target_ulong a3,
                         target_ulong kernel_addr)
 {
-    bl_gen_load_ulong(p, BL_REG_SP, sp);
-    bl_gen_load_ulong(p, BL_REG_A0, a0);
-    bl_gen_load_ulong(p, BL_REG_A1, a1);
-    bl_gen_load_ulong(p, BL_REG_A2, a2);
-    bl_gen_load_ulong(p, BL_REG_A3, a3);
+    if (set_sp) {
+        bl_gen_load_ulong(p, BL_REG_SP, sp);
+    }
+    if (set_a0) {
+        bl_gen_load_ulong(p, BL_REG_A0, a0);
+    }
+    if (set_a1) {
+        bl_gen_load_ulong(p, BL_REG_A1, a1);
+    }
+    if (set_a2) {
+        bl_gen_load_ulong(p, BL_REG_A2, a2);
+    }
+    if (set_a3) {
+        bl_gen_load_ulong(p, BL_REG_A3, a3);
+    }
 
     bl_gen_jump_to(p, kernel_addr);
 }
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index d2ab9da1a0..8976f036e6 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -351,7 +351,10 @@  static void gen_firmware(uint32_t *p, hwaddr kernel_entry, hwaddr fdt_addr)
      * a2/$6 = 0
      * a3/$7 = 0
      */
-    bl_gen_jump_kernel(&p, 0, (int32_t)-2, fdt_addr, 0, 0, kernel_entry);
+    bl_gen_jump_kernel(&p,
+                       true, 0, true, (int32_t)-2,
+                       true, fdt_addr, true, 0, true, 0,
+                       kernel_entry);
 }
 
 static const void *boston_fdt_filter(void *opaque, const void *fdt_orig,
diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index 5ee546f5f6..b7bf48f9b8 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -180,8 +180,12 @@  static void write_bootloader(CPUMIPSState *env, uint8_t *base,
     /* Second part of the bootloader */
     p = (uint32_t *)(base + 0x040);
 
-    bl_gen_jump_kernel(&p, ENVP_VADDR - 64, 2, ENVP_VADDR, ENVP_VADDR + 8,
-                       loaderparams.ram_size, kernel_addr);
+    bl_gen_jump_kernel(&p,
+                       true, ENVP_VADDR - 64,
+                       true, 2, true, ENVP_VADDR,
+                       true, ENVP_VADDR + 8,
+                       true, loaderparams.ram_size,
+                       kernel_addr);
 }
 
 static void main_cpu_reset(void *opaque)
diff --git a/include/hw/mips/bootloader.h b/include/hw/mips/bootloader.h
index b5f48d71bb..fffb0b7da8 100644
--- a/include/hw/mips/bootloader.h
+++ b/include/hw/mips/bootloader.h
@@ -12,8 +12,12 @@ 
 #include "exec/cpu-defs.h"
 
 void bl_gen_jump_to(uint32_t **p, target_ulong jump_addr);
-void bl_gen_jump_kernel(uint32_t **p, target_ulong sp, target_ulong a0,
-                        target_ulong a1, target_ulong a2, target_ulong a3,
+void bl_gen_jump_kernel(uint32_t **p,
+                        bool set_sp, target_ulong sp,
+                        bool set_a0, target_ulong a0,
+                        bool set_a1, target_ulong a1,
+                        bool set_a2, target_ulong a2,
+                        bool set_a3, target_ulong a3,
                         target_ulong kernel_addr);
 void bl_gen_write_ulong(uint32_t **p, target_ulong addr, target_ulong val);
 void bl_gen_write_u32(uint32_t **p, target_ulong addr, uint32_t val);