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([103.100.225.182]) by smtp.gmail.com with ESMTPSA id k3-20020aa79983000000b0056bfa2cf517sm324788pfh.3.2022.10.24.16.24.48 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Oct 2022 16:24:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 4/4] include/qemu/atomic128: Avoid __sync_val_compare_and_swap_16 Date: Tue, 25 Oct 2022 09:24:35 +1000 Message-Id: <20221024232435.3334600-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221024232435.3334600-1-richard.henderson@linaro.org> References: <20221024232435.3334600-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102b; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Merge the CONFIG_ATOMIC128 and CONFIG_CMPXCHG128 cases with respect to atomic16_cmpxchg and use __atomic_compare_exchange_nomic (via qatomic_cmpxchg) instead of the "legacy" __sync_val_compare_and_swap_16. Update the meson has_cmpxchg128 test to match. Signed-off-by: Richard Henderson --- include/qemu/atomic128.h | 8 +------- meson.build | 3 ++- 2 files changed, 3 insertions(+), 8 deletions(-) diff --git a/include/qemu/atomic128.h b/include/qemu/atomic128.h index adb9a1a260..ec45754515 100644 --- a/include/qemu/atomic128.h +++ b/include/qemu/atomic128.h @@ -41,18 +41,12 @@ * Therefore, special case each platform. */ -#if defined(CONFIG_ATOMIC128) +#if defined(CONFIG_ATOMIC128) || defined(CONFIG_CMPXCHG128) static inline Int128 atomic16_cmpxchg(Int128 *ptr, Int128 cmp, Int128 new) { return qatomic_cmpxchg__nocheck(ptr, cmp, new); } # define HAVE_CMPXCHG128 1 -#elif defined(CONFIG_CMPXCHG128) -static inline Int128 atomic16_cmpxchg(Int128 *ptr, Int128 cmp, Int128 new) -{ - return __sync_val_compare_and_swap_16(ptr, cmp, new); -} -# define HAVE_CMPXCHG128 1 #elif defined(__aarch64__) /* Through gcc 8, aarch64 has no support for 128-bit at all. */ static inline Int128 atomic16_cmpxchg(Int128 *ptr, Int128 cmp, Int128 new) diff --git a/meson.build b/meson.build index 1ec3f72edc..d8c4e76e7b 100644 --- a/meson.build +++ b/meson.build @@ -2224,7 +2224,8 @@ if has_int128 int main(void) { unsigned __int128 x = 0, y = 0; - __sync_val_compare_and_swap_16(&x, y, x); + __atomic_compare_exchange_n(&x, &y, x, 0, + __ATOMIC_RELAXED, __ATOMIC_RELAXED); return 0; } ''')