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[209.51.188.17]) by mx.google.com with ESMTPS id b5-20020a05620a118500b006e73f176c7bsi4631659qkk.498.2022.10.16.15.15.04 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 16 Oct 2022 15:15:05 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iE1KGCKK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:39538 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1okBuS-0004cy-4Y for patch@linaro.org; Sun, 16 Oct 2022 18:15:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54764) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1okBq3-0002d5-N5 for qemu-devel@nongnu.org; Sun, 16 Oct 2022 18:10:31 -0400 Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]:38555) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1okBq1-0007qa-Up for qemu-devel@nongnu.org; Sun, 16 Oct 2022 18:10:31 -0400 Received: by mail-pj1-x1032.google.com with SMTP id x1-20020a17090ab00100b001fda21bbc90so12584578pjq.3 for ; Sun, 16 Oct 2022 15:10:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6bcy/cgrj5zD+rnRzRv+8Z9hvfKTyl1svf3Chx5N2Jw=; b=iE1KGCKKNqnK0lKfrQNtZC35VJ8rMe9B13D93qNacvgssTD+ytXm9JbJZJ8h9fiZ2X 4XfLwZCpjBWVgnW26D8d/Nggk5ovYeMYHJh7HFCUu3fdxaF3hLVLx5VC8/NKDHon0DC1 PMVkmhnf4GD1MEZjInHipB+WzMFjVu9tUAz/fRHJTig6yhVFlrOzHwvc9QDtleEaSLXk dus7sS/B44fUY7QWm7+e6FSixiKZtmNu6BW6UyNvAtr5WjCQ5IZe6SAJqGOgT9PljOCd BidxNo8/544daiGAsl4hI3wq6Iiaw3z669b2aZOgrRTFKvi5pqeZ9o/R/C4h0kBNe9IC Xv6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6bcy/cgrj5zD+rnRzRv+8Z9hvfKTyl1svf3Chx5N2Jw=; b=M2X+heI+4P6XSZgNbonP7jE5ew/3nT7lbbWm2+BdkWJj28KxdSUxwAiF9lEZkbqZgx Na2lDn+G3Pv9XRCQok1zYl5chAtmuMiDVWx/1dSBSqvXqHtRdmc4QWZJghyuohGpxuvl aZ6eTCsXxQT2KzJW7nnWefFaiUqVx7Egc6YWCqQsdRQkiVxwSyBoqkuzaR1tfz8uoBmp FXNXGNZmkLeORvFXGcpLNE0xaOQUUUx+sAyx1YM6WS85SjLbWpHh5a6uBRs0WUmIzAHe XTnaUaUvP3t9cQFZDy8VuAIAfvjd7KgHbx+zgBi04YcrIW+MNQ1NkUeAbnwn/5kCiIA8 nCtw== X-Gm-Message-State: ACrzQf2aJuqGdYG8yEuiNK9cRVAxpjf8LltKgCFBlTnC0yVCghkpQ+th +fK1T3CdIqH9UYotTk20onNMyvFqcgxxk5gC X-Received: by 2002:a17:90b:4b46:b0:20a:e906:426d with SMTP id mi6-20020a17090b4b4600b0020ae906426dmr10402702pjb.48.1665958227868; Sun, 16 Oct 2022 15:10:27 -0700 (PDT) Received: from localhost.localdomain ([149.135.10.35]) by smtp.gmail.com with ESMTPSA id z18-20020aa79592000000b0053e2b61b714sm5454751pfj.114.2022.10.16.15.10.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 16 Oct 2022 15:10:27 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v7 5/9] target/arm: Remove gen_exception_internal_insn pc argument Date: Mon, 17 Oct 2022 08:09:28 +1000 Message-Id: <20221016220932.274260-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221016220932.274260-1-richard.henderson@linaro.org> References: <20221016220932.274260-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" In preparation for TARGET_TB_PCREL, reduce reliance on absolute values. Since we always pass dc->pc_curr, fold the arithmetic to zero displacement. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 6 +++--- target/arm/translate.c | 10 +++++----- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 49380e1cfe..623f7e2e96 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -332,9 +332,9 @@ static void gen_exception_internal(int excp) gen_helper_exception_internal(cpu_env, tcg_constant_i32(excp)); } -static void gen_exception_internal_insn(DisasContext *s, uint64_t pc, int excp) +static void gen_exception_internal_insn(DisasContext *s, int excp) { - gen_a64_update_pc(s, pc - s->pc_curr); + gen_a64_update_pc(s, 0); gen_exception_internal(excp); s->base.is_jmp = DISAS_NORETURN; } @@ -2211,7 +2211,7 @@ static void disas_exc(DisasContext *s, uint32_t insn) * Secondly, "HLT 0xf000" is the A64 semihosting syscall instruction. */ if (semihosting_enabled(s->current_el == 0) && imm16 == 0xf000) { - gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST); + gen_exception_internal_insn(s, EXCP_SEMIHOST); } else { unallocated_encoding(s); } diff --git a/target/arm/translate.c b/target/arm/translate.c index 350f991649..9104ab8232 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -1074,10 +1074,10 @@ static inline void gen_smc(DisasContext *s) s->base.is_jmp = DISAS_SMC; } -static void gen_exception_internal_insn(DisasContext *s, uint32_t pc, int excp) +static void gen_exception_internal_insn(DisasContext *s, int excp) { gen_set_condexec(s); - gen_update_pc(s, pc - s->pc_curr); + gen_update_pc(s, 0); gen_exception_internal(excp); s->base.is_jmp = DISAS_NORETURN; } @@ -1169,7 +1169,7 @@ static inline void gen_hlt(DisasContext *s, int imm) */ if (semihosting_enabled(s->current_el != 0) && (imm == (s->thumb ? 0x3c : 0xf000))) { - gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST); + gen_exception_internal_insn(s, EXCP_SEMIHOST); return; } @@ -6556,7 +6556,7 @@ static bool trans_BKPT(DisasContext *s, arg_BKPT *a) if (arm_dc_feature(s, ARM_FEATURE_M) && semihosting_enabled(s->current_el == 0) && (a->imm == 0xab)) { - gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST); + gen_exception_internal_insn(s, EXCP_SEMIHOST); } else { gen_exception_bkpt_insn(s, syn_aa32_bkpt(a->imm, false)); } @@ -8762,7 +8762,7 @@ static bool trans_SVC(DisasContext *s, arg_SVC *a) if (!arm_dc_feature(s, ARM_FEATURE_M) && semihosting_enabled(s->current_el == 0) && (a->imm == semihost_imm)) { - gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST); + gen_exception_internal_insn(s, EXCP_SEMIHOST); } else { gen_update_pc(s, curr_insn_len(s)); s->svc_imm = a->imm;