From patchwork Fri Sep 30 21:26:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 610955 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp1752355pvb; Fri, 30 Sep 2022 14:28:02 -0700 (PDT) X-Google-Smtp-Source: AMsMyM69jKx7JRdj0ukmEGtg6uYcx/kYC6Nj76staDYYJZK9h0mlq6pbtp+qxnYZU0AH8KjSWSsG X-Received: by 2002:ae9:f20c:0:b0:6ce:ce8b:d780 with SMTP id m12-20020ae9f20c000000b006cece8bd780mr7477539qkg.316.1664573281916; Fri, 30 Sep 2022 14:28:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1664573281; cv=none; d=google.com; s=arc-20160816; b=mAlnaYRxE8jElbxulIJz9zFds2XUsi8SpGf5j6283dbSfVwpSkh54iRv/aakZDjl+H cLRrdypHAGl/B+ZBshK9J0l9NE46LZobRTZLzy0DcWZfbo3dfFj5kQiqTOnOJxYFAJZK cOJaM1SRFvDSS9hwxolUYPsVf8fStx4L6yuwvDIVkmCFr9MGrBSZSJVvcvAR+nbjTUE0 yEn42c9mXcSEw3ARa8G1vLmsMpAgUFI7QvYId/Rzt8cn69uVmKcw1sFTdF4/Yjd6+oLu ZD7JjKyNkb4IJvrcgRTIXqDS3Xv2nj+g+5kFqxDulEu753uzsTWcvtDhwRQ6wl23sn+Q vAQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=St5dCg8yC5zIkIV0jUFWp9UWjpefIW881mvaUfGPCfo=; b=ZI7xlHElI0Va/2JQMvGjLrnOyJnWxphurLAXtMOmAV6ThY8o5i0W0GifMl5LZIGdkn 8VmXTBDynCQwZ0q8wW0G8sNCzdx4bo4JtNXbs1g1TnOZios2WBtZSk9rW5eUwztfqOjk WCt4r6epGbU8EzSgbjj2TnyUJ64Cgqkc5sUutkM5COSwY6rxUtSwR1PSrhZkis8bHppA 2/tQ7LKFLm9nWsrUf8Jmsc2A9VuSURUJ98EPoZOa69nJBemYP9/0iwD/on/OHfSF8ksr KhZ/+m4auq9uCYqDcVJJAyl4UYqn0ApAAC0HrICvFJ2WoPwp5Liv+a6xgjDZDjdTC5fs oyuw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="wyyQ/kPF"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id jq12-20020ad45fcc000000b004b17ac12d5bsi61858qvb.480.2022.09.30.14.28.01 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 30 Sep 2022 14:28:01 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="wyyQ/kPF"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:37176 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oeNY9-0006Ma-E9 for patch@linaro.org; Fri, 30 Sep 2022 17:28:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48200) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oeNWu-0006FY-AL for qemu-devel@nongnu.org; Fri, 30 Sep 2022 17:26:44 -0400 Received: from mail-qv1-xf2c.google.com ([2607:f8b0:4864:20::f2c]:39858) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oeNWr-0005OH-Ry for qemu-devel@nongnu.org; Fri, 30 Sep 2022 17:26:44 -0400 Received: by mail-qv1-xf2c.google.com with SMTP id z18so3378178qvn.6 for ; Fri, 30 Sep 2022 14:26:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=St5dCg8yC5zIkIV0jUFWp9UWjpefIW881mvaUfGPCfo=; b=wyyQ/kPFXbgigJ4kzZxQj6DW70lHpPFMo3lKF7N1JKIgS+LyX5asEN6RWCydAVU9J0 DkM8g3zkSKNPz1jBgBZXl+yTtQJ1TvQSvoeOCOy0hwUyvRIJ8wieS5PH2UloFlXuF3h1 hHPjW9kFWNXiOejIySNfhU24MZ2bnaEzzZ6oXFmlIC5EZmge+FHr1Pl1RT05vlH0Vkge X5v8OdncOATH1w+6av83QvslLJ/+l9HkuYv0RetkoqsCQzOC/ysg8yEFG5CjOFwBfA9+ +laKO/jaURcaHVf/ZLVuyo+30D1q72b5EJpF9MRiFtt3xMpYJL9uuYyfa3ZIEMvqazQk /ynQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=St5dCg8yC5zIkIV0jUFWp9UWjpefIW881mvaUfGPCfo=; b=sEpW5aBhtH+S/8pRedGdXr1uN1yvbxCzirYKs6zwEAxZFWZW5wsAPPTNrlg//NYmee rczzELk02X0IF2XaycWsSLLHlr71ZGf5roCpAaX3Bc/HMhxVeUxZuPjFPf6M3rzq9tjc acXxOM5mU6sVWN4hw6mCzeE/Ufjyh7e0TF0KhPfBixf6xUPv1GsZQZGvBpww2xpqC906 p/perb7NieC9gil71JTZp8bJ/lA2+ZVxUSKRbQn0iEyKuh4nWcrq3nobGyM4Ke9csU1P v8dilFciiokRp+W/RlMAy3GYCW1cHpBPs7QKQOM/wfmDk0GtbqTa+bUalZF6s1c/gmRi 4JEA== X-Gm-Message-State: ACrzQf1Lad9gWv6RsXEq3YJ7xnWQdePKgdN1U5shuhHLsyStjz2t4fGa UarpYx4saaFYv7JEPutjfgsA10kseBDFpw== X-Received: by 2002:a05:6214:5096:b0:4af:aef9:f78c with SMTP id kk22-20020a056214509600b004afaef9f78cmr7994664qvb.63.1664573200394; Fri, 30 Sep 2022 14:26:40 -0700 (PDT) Received: from stoup.. ([2605:ef80:80a1:5a60:d0d7:468b:5667:114b]) by smtp.gmail.com with ESMTPSA id l18-20020a05620a28d200b006ce813bb306sm3696370qkp.125.2022.09.30.14.26.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Sep 2022 14:26:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linux.org, alex.bennee@linux.org, =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , David Hildenbrand , Peter Maydell Subject: [PATCH v6 06/18] accel/tcg: Suppress auto-invalidate in probe_access_internal Date: Fri, 30 Sep 2022 14:26:10 -0700 Message-Id: <20220930212622.108363-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220930212622.108363-1-richard.henderson@linaro.org> References: <20220930212622.108363-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::f2c; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf2c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" When PAGE_WRITE_INV is set when calling tlb_set_page, we immediately set TLB_INVALID_MASK in order to force tlb_fill to be called on the next lookup. Here in probe_access_internal, we have just called tlb_fill and eliminated true misses, thus the lookup must be valid. This allows us to remove a warning comment from s390x. There doesn't seem to be a reason to change the code though. Reviewed-by: Alex Bennée Reviewed-by: David Hildenbrand Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 10 +++++++++- target/s390x/tcg/mem_helper.c | 4 ---- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index d06ff44ce9..264f84a248 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1533,6 +1533,7 @@ static int probe_access_internal(CPUArchState *env, target_ulong addr, } tlb_addr = tlb_read_ofs(entry, elt_ofs); + flags = TLB_FLAGS_MASK; page_addr = addr & TARGET_PAGE_MASK; if (!tlb_hit_page(tlb_addr, page_addr)) { if (!victim_tlb_hit(env, mmu_idx, index, elt_ofs, page_addr)) { @@ -1547,10 +1548,17 @@ static int probe_access_internal(CPUArchState *env, target_ulong addr, /* TLB resize via tlb_fill may have moved the entry. */ entry = tlb_entry(env, mmu_idx, addr); + + /* + * With PAGE_WRITE_INV, we set TLB_INVALID_MASK immediately, + * to force the next access through tlb_fill. We've just + * called tlb_fill, so we know that this entry *is* valid. + */ + flags &= ~TLB_INVALID_MASK; } tlb_addr = tlb_read_ofs(entry, elt_ofs); } - flags = tlb_addr & TLB_FLAGS_MASK; + flags &= tlb_addr; /* Fold all "mmio-like" bits into TLB_MMIO. This is not RAM. */ if (unlikely(flags & ~(TLB_WATCHPOINT | TLB_NOTDIRTY))) { diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index fc52aa128b..3758b9e688 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -148,10 +148,6 @@ static int s390_probe_access(CPUArchState *env, target_ulong addr, int size, #else int flags; - /* - * For !CONFIG_USER_ONLY, we cannot rely on TLB_INVALID_MASK or haddr==NULL - * to detect if there was an exception during tlb_fill(). - */ env->tlb_fill_exc = 0; flags = probe_access_flags(env, addr, access_type, mmu_idx, nonfault, phost, ra);