From patchwork Fri Sep 23 08:48:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 608583 Delivered-To: patch@linaro.org Received: by 2002:a17:522:c983:b0:460:3032:e3c4 with SMTP id kr3csp147808pvb; Fri, 23 Sep 2022 01:53:47 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6ckct5gUb8+FH0SmkkxUzmdZUYZAjjjxPBPSWrBgTNCyAtbpNXlnZdHQ/7HhsKOWrMxLdf X-Received: by 2002:a05:622a:14a:b0:35d:54:a00a with SMTP id v10-20020a05622a014a00b0035d0054a00amr6259004qtw.307.1663923226899; Fri, 23 Sep 2022 01:53:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663923226; cv=none; d=google.com; s=arc-20160816; b=MtxiOf9yqLk823YZhWVhizaZ6UdN9Vad4carx8q3V18gRLJUqQZ4qmKAqQmlTITk4b DosefjZdOcc92ZU/OHhSGTAET5B0STRgMY6NQzhY9d/x5FPv/y+CDqGkSulvp5tsJuOF O8nO76+TNrbaWbOjK35AybotTvIBD5819L+s4RBlU0b6fpjN73PDrraW0N+OeKGb/3J4 sM6pQI7/jkMPS2yglkCvEyUA5YPVOIP23qFqNqeBSLuGlc3LcIgCmkOnfq706UhKTYTH 5eltA3C6bbUVSPJ3QUHR4BCXRWsJ4yQ2lLu/segvf1Cd+ClkccntF6CDsmtP0x4RkaKz +Y7Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=RLodW1RGB3Ig4Jk4s09PC93PTQ+o6wIE1lXDJxrSApA=; b=qMGMxNE2agz4OYPOqc/FeZMCQ5EUCK0M/RT613B88PtGdg4hHamNmJe1Y3ia6uURpt u8RkXIwLJCbA12/W1242+B9dBeTeYZzXP33/Uh3lWXTl8NHVX7EyNP+9iDP9CG78MuqR ZoYtAynHdPBOcTULi/2PzboWXlz+roBVkDjR+UMMTgpP1E3DyZB0FRZMwZHNVkZG8eml PJuef9uMWk3ej2y8PYPEHPIuupYsLh7HRROGNLvfo7iT2SbFAYien8hq4uf2bjNBN5Eq 6kuc8UiqwXSjTXYxDu7Pr9wSuBwKtYAqSUg8KK7KARFIliGA4QZjJZbe7Wq7i99Zcrvm b2+A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t4-20020a0562140c6400b0049915000526si4225401qvj.450.2022.09.23.01.53.46 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 23 Sep 2022 01:53:46 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:51536 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1obeRO-00070J-F0 for patch@linaro.org; Fri, 23 Sep 2022 04:53:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36380) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1obeMT-0005BA-EN; Fri, 23 Sep 2022 04:48:42 -0400 Received: from mail.ozlabs.org ([2404:9400:2221:ea00::3]:53011 helo=gandalf.ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1obeMP-0005Pu-RW; Fri, 23 Sep 2022 04:48:41 -0400 Received: from gandalf.ozlabs.org (gandalf.ozlabs.org [150.107.74.76]) by gandalf.ozlabs.org (Postfix) with ESMTP id 4MYm5R0QtNz4xGT; Fri, 23 Sep 2022 18:48:27 +1000 (AEST) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4MYm5N3jsHz4xGN; Fri, 23 Sep 2022 18:48:24 +1000 (AEST) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Peter Maydell , Richard Henderson , Joel Stanley , Andrew Jeffery , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?C=C3=A9dri?= =?utf-8?q?c_Le_Goater?= Subject: [PATCH 5/6] ssi: cache SSIPeripheralClass to avoid GET_CLASS() Date: Fri, 23 Sep 2022 10:48:02 +0200 Message-Id: <20220923084803.498337-6-clg@kaod.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220923084803.498337-1-clg@kaod.org> References: <20220923084803.498337-1-clg@kaod.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2404:9400:2221:ea00::3; envelope-from=SRS0=gbDQ=Z2=kaod.org=clg@ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -39 X-Spam_score: -4.0 X-Spam_bar: ---- X-Spam_report: (-4.0 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Alex Bennée Investigating why some BMC models are so slow compared to a plain ARM virt machines I did some profiling of: ./qemu-system-arm -M romulus-bmc -nic user \ -drive file=obmc-phosphor-image-romulus.static.mtd,format=raw,if=mtd \ -nographic -serial mon:stdio And saw that object_class_dynamic_cast_assert was dominating the profile times. We have a number of cases in this model of the SSI bus. As the class is static once the object is created we just cache it and use it instead of the dynamic case macros. Profiling against: ./tests/venv/bin/avocado run \ tests/avocado/machine_aspeed.py:test_arm_ast2500_romulus_openbmc_v2_9_0 Before: 35.565 s ± 0.087 s After: 15.713 s ± 0.287 s Signed-off-by: Alex Bennée Cc: Cédric Le Goater Tested-by: Cédric Le Goater Reviewed-by: Cédric Le Goater Message-Id: <20220811151413.3350684-6-alex.bennee@linaro.org> Signed-off-by: Cédric Le Goater --- include/hw/ssi/ssi.h | 3 +++ hw/ssi/ssi.c | 18 ++++++++---------- 2 files changed, 11 insertions(+), 10 deletions(-) diff --git a/include/hw/ssi/ssi.h b/include/hw/ssi/ssi.h index f411858ab083..6950f86810d3 100644 --- a/include/hw/ssi/ssi.h +++ b/include/hw/ssi/ssi.h @@ -59,6 +59,9 @@ struct SSIPeripheralClass { struct SSIPeripheral { DeviceState parent_obj; + /* cache the class */ + SSIPeripheralClass *spc; + /* Chip select state */ bool cs; }; diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c index 003931fb509e..d54a109beeb5 100644 --- a/hw/ssi/ssi.c +++ b/hw/ssi/ssi.c @@ -38,9 +38,8 @@ static void ssi_cs_default(void *opaque, int n, int level) bool cs = !!level; assert(n == 0); if (s->cs != cs) { - SSIPeripheralClass *ssc = SSI_PERIPHERAL_GET_CLASS(s); - if (ssc->set_cs) { - ssc->set_cs(s, cs); + if (s->spc->set_cs) { + s->spc->set_cs(s, cs); } } s->cs = cs; @@ -48,11 +47,11 @@ static void ssi_cs_default(void *opaque, int n, int level) static uint32_t ssi_transfer_raw_default(SSIPeripheral *dev, uint32_t val) { - SSIPeripheralClass *ssc = SSI_PERIPHERAL_GET_CLASS(dev); + SSIPeripheralClass *ssc = dev->spc; if ((dev->cs && ssc->cs_polarity == SSI_CS_HIGH) || - (!dev->cs && ssc->cs_polarity == SSI_CS_LOW) || - ssc->cs_polarity == SSI_CS_NONE) { + (!dev->cs && ssc->cs_polarity == SSI_CS_LOW) || + ssc->cs_polarity == SSI_CS_NONE) { return ssc->transfer(dev, val); } return 0; @@ -67,6 +66,7 @@ static void ssi_peripheral_realize(DeviceState *dev, Error **errp) ssc->cs_polarity != SSI_CS_NONE) { qdev_init_gpio_in_named(dev, ssi_cs_default, SSI_GPIO_CS, 1); } + s->spc = ssc; ssc->realize(s, errp); } @@ -115,13 +115,11 @@ uint32_t ssi_transfer(SSIBus *bus, uint32_t val) { BusState *b = BUS(bus); BusChild *kid; - SSIPeripheralClass *ssc; uint32_t r = 0; QTAILQ_FOREACH(kid, &b->children, sibling) { - SSIPeripheral *peripheral = SSI_PERIPHERAL(kid->child); - ssc = SSI_PERIPHERAL_GET_CLASS(peripheral); - r |= ssc->transfer_raw(peripheral, val); + SSIPeripheral *p = SSI_PERIPHERAL(kid->child); + r |= p->spc->transfer_raw(p, val); } return r;