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[209.51.188.17]) by mx.google.com with ESMTPS id bk13-20020a05620a1a0d00b006ce54bf3feesi1692082qkb.57.2022.09.14.09.57.35 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 14 Sep 2022 09:57:36 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="VjBYn/qn"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:35408 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oYVhe-0003xG-5n for patch@linaro.org; Wed, 14 Sep 2022 12:57:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33590) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oYUxj-0005lN-A6 for qemu-devel@nongnu.org; Wed, 14 Sep 2022 12:10:12 -0400 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]:33398) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oYUxe-0004Pf-SB for qemu-devel@nongnu.org; Wed, 14 Sep 2022 12:10:06 -0400 Received: by mail-wr1-x432.google.com with SMTP id k9so26534957wri.0 for ; Wed, 14 Sep 2022 09:09:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=KTWhWCodscN9QmBf6ymhSnJIqLxNPXfRH0SuystR2vc=; b=VjBYn/qnFC5H71kgDB5wD+9OSGyUu9KiEHZmaonTUpgISEHHqSAfELVqCq3rYDrJfQ nHgmfxNDNi7SOHoBXF8GcjuCwTyOnzIXUURgqE037CKk0njVilR7bk+sRbJrWDcpUoWN jYUkH5hxAQkqxVFh+IL9AvO7RJneJapvAwELAL5iV2Fv/H0MPfhNOWuvnQRg11EdkpSv 49UDFSPCOmGV/t/guRNVvj65i1zs3XfysMWe9alBDWU5fCrbvd+x9qU6Eejw411IA8h0 d6dI+BXDbBkiDZbwQgQ0MaUi+nRIZSOaup4XVkUUunmzpIYcAH+PuodUto2fBpH5RaGN Zg5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=KTWhWCodscN9QmBf6ymhSnJIqLxNPXfRH0SuystR2vc=; b=lZrWSJFAxmrFWmf5LpR9dF65FG9OFwiHJX93Q7z23tJpySpSeQnO+ssD4mzEhlvHDw lejyoZ/XjkBaIP+dz/UrfB4E6TAEuO6zHX7esLVPFacrEah6SUkrUl9nGNb/HA6qs5Xv XMriwMUjx+B5idvQWY1fAo2D4Eqwnp4NYGrkYPrm0DUd90Wro6oR5aUQ8fXOK1CVD7xr fGih4fUxjWJgIWmcSlOfP6GdMx6MF99L071zVibJhML1enkXwKJvC7Zwg6vwFdSDfOf5 YYcgnCJcV3I/V0ZHZD6CD/9QcY9x6OPCyC3xojsEhqRxb9ujAP9DxiFBVsxpMhbnRnMq wExg== X-Gm-Message-State: ACgBeo3ybf1i70f9/cwEMFAS9RQi4Q/wG/PURLYjY7eoy8dsqHvBW4wR sIvFjbfIx5SJzPxPL+wfZ7AvQw== X-Received: by 2002:adf:d1ec:0:b0:228:d9ea:cbd2 with SMTP id g12-20020adfd1ec000000b00228d9eacbd2mr21998462wrd.609.1663171799021; Wed, 14 Sep 2022 09:09:59 -0700 (PDT) Received: from zen.linaroharston ([185.81.254.11]) by smtp.gmail.com with ESMTPSA id b17-20020adfee91000000b0022ac12fff29sm4911415wro.65.2022.09.14.09.09.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Sep 2022 09:09:56 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 769FE1FFBC; Wed, 14 Sep 2022 17:09:55 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Peter Maydell Subject: [RFC PATCH 4/4] hw/timer: convert mptimer access to attrs to derive cpu index Date: Wed, 14 Sep 2022 17:09:55 +0100 Message-Id: <20220914160955.812151-5-alex.bennee@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220914160955.812151-1-alex.bennee@linaro.org> References: <20220914160955.812151-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This removes the hacks to deal with empty current_cpu. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- hw/timer/arm_mptimer.c | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/hw/timer/arm_mptimer.c b/hw/timer/arm_mptimer.c index cdfca3000b..a7fe6ddc0d 100644 --- a/hw/timer/arm_mptimer.c +++ b/hw/timer/arm_mptimer.c @@ -41,9 +41,10 @@ * which is used in both the ARM11MPCore and Cortex-A9MP. */ -static inline int get_current_cpu(ARMMPTimerState *s) +static inline int get_current_cpu(ARMMPTimerState *s, MemTxAttrs attrs) { - int cpu_id = current_cpu ? current_cpu->cpu_index : 0; + int cpu_id = attrs.requester_id; + g_assert(attrs.requester_cpu == 1); if (cpu_id >= s->num_cpu) { hw_error("arm_mptimer: num-cpu %d but this cpu is %d!\n", @@ -178,25 +179,27 @@ static void timerblock_write(void *opaque, hwaddr addr, /* Wrapper functions to implement the "read timer/watchdog for * the current CPU" memory regions. */ -static uint64_t arm_thistimer_read(void *opaque, hwaddr addr, - unsigned size) +static MemTxResult arm_thistimer_read(void *opaque, hwaddr addr, uint64_t *data, + unsigned size, MemTxAttrs attrs) { ARMMPTimerState *s = (ARMMPTimerState *)opaque; - int id = get_current_cpu(s); - return timerblock_read(&s->timerblock[id], addr, size); + int id = get_current_cpu(s, attrs); + *data = timerblock_read(&s->timerblock[id], addr, size); + return MEMTX_OK; } -static void arm_thistimer_write(void *opaque, hwaddr addr, - uint64_t value, unsigned size) +static MemTxResult arm_thistimer_write(void *opaque, hwaddr addr, + uint64_t value, unsigned size, MemTxAttrs attrs) { ARMMPTimerState *s = (ARMMPTimerState *)opaque; - int id = get_current_cpu(s); + int id = get_current_cpu(s, attrs); timerblock_write(&s->timerblock[id], addr, value, size); + return MEMTX_OK; } static const MemoryRegionOps arm_thistimer_ops = { - .read = arm_thistimer_read, - .write = arm_thistimer_write, + .read_with_attrs = arm_thistimer_read, + .write_with_attrs = arm_thistimer_write, .valid = { .min_access_size = 4, .max_access_size = 4,