From patchwork Tue Sep 6 09:11:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 602975 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:4388:0:0:0:0 with SMTP id w8csp4374300mae; Tue, 6 Sep 2022 02:57:42 -0700 (PDT) X-Google-Smtp-Source: AA6agR5Y5GWcnQ0WoKhi2JlJNXPXPLJfRMW0TH/I9+PhQNJx5HtcKyE0cIL48zJDtXPMHAb073FX X-Received: by 2002:a05:620a:1590:b0:6be:6c26:469b with SMTP id d16-20020a05620a159000b006be6c26469bmr35312127qkk.415.1662458261937; Tue, 06 Sep 2022 02:57:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1662458261; cv=none; d=google.com; s=arc-20160816; b=FV2CWG0tISxSTS70zd50Ljjp59O5DQiZlsSAjLX+qKuYupUcPMgKy/DefXWW1YG66d 3kaU5KAf/NeY/4XfXF75lQPRzQ7uo8cmfb8W8hEx8VmOHtB8JXapNFQadKe2DLX//7v+ OtSPflWynOY2yE1UWAcYACtKXSF1Il1zPPboeOMB0xJiu/nTYkC2NhMtipiKvQYvC+kF 1yhai5DU/l+LaxwgsGjD3mUaV/oLoq40bg3wKzo2oWIxlZ8YTQu0dhpnE85cVS1hdp+6 YVOPAbmDP5CTi5ot1lBAaZuu2gzcqqHvNG5aSID5dDdfp3hrh3ggtwOBrdptFzM2tQey t/6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=qlzuOiT7al52A4Nk8KupfT4BUsz3r5f4dGItuN4LVck=; b=A4CjCYC6B/8W1dL/w1aysEfQMbfFgcYJ5mQIqZ/rvYAhMpMqDWlpi5eLcULdXY5H8X KBDM8lZkSvNOEO+TqxzqApHPJHU0VfY1XQb8YvfJ4lPCicVH4SfkNZhRWK1TUUfX6MAO Fs+2+6mLoG8lWpaohfUGSB5MrmDXooGNu0FOuXKqvxHaU72yNDM8dI3dcvHm/ZwayA0u 7f42jvk5Of3SJjZkBKBMr3W6Eb/glCAesB7VRiPVi4rCvzKDSapR51fgUJtQPYf5HozV XGS/Ty2ibEuGyDxzwLtjytF/n/ZOo9hCpzZgV25SOE8i4pn3U8MkOS8p0JCUdznk+xGs iVlw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=duL32hpb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id g7-20020ac87d07000000b00342fdbee6desi7934469qtb.181.2022.09.06.02.57.41 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 06 Sep 2022 02:57:41 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=duL32hpb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:34558 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oVVKv-0001Zl-FF for patch@linaro.org; Tue, 06 Sep 2022 05:57:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51094) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oVUcM-0007Ux-3N for qemu-devel@nongnu.org; Tue, 06 Sep 2022 05:11:39 -0400 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]:42847) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oVUcJ-0002el-4Z for qemu-devel@nongnu.org; Tue, 06 Sep 2022 05:11:37 -0400 Received: by mail-wr1-x430.google.com with SMTP id bp20so13954370wrb.9 for ; Tue, 06 Sep 2022 02:11:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date; bh=qlzuOiT7al52A4Nk8KupfT4BUsz3r5f4dGItuN4LVck=; b=duL32hpbomSinxYUEF69HmruQgPh3TSA4VULugSbTc3Uxg9xy/2Jqi9FNSCvtbra4x B0+mCRwrhCY6D+m3PyFODniuWadmbR9XqZDQdySlg7zyMbro30Z3g4tWtgKHTCoGZSgr Ni4mZXCwzHZKoV9aC27QthL9fEmR/5UALTSIHBs9pIC88GgUlwyjEaCWSMUJ0MlfW6O6 /XM2t3TQ1NyXA0Ek6ihYdwxvaZg6JF2x7YqEvEgqC6ne+CsKwFmoD8FFp0jZtjfWeB8N R8iOrOBDRRUoF5FDx2Ugs7RoG2A0FpmhIQmwn9DGTGCWzM21EkuQF9K4WeHVOkOVvVul 3Twg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date; bh=qlzuOiT7al52A4Nk8KupfT4BUsz3r5f4dGItuN4LVck=; b=O01bllsTUdet11CB2rafxhXdUYNPNPFB1cwcqvCS20HNWaEn8DLu3nRUGy/73uaY+K oLcHQmEoE7+eXT/pdlC1ykSXlby+U9VzHweGfpJ9fXqHltGOcxM+mCDqbgZqlpu8Xi6V NBquI8PUYK0khWWx1qYcYDb40wsiXkRNCzKZ+uD5902G6IEX3Uz/CupD62yV6lMvkiwT 7nm4C1Dha88UgH5Xt5gPKw+ucplDOVFFrILTJWaoDTmtyYtmR2YipnxGMYoDZnOVwEqz GoDpthGm32odtJ453/U2ylBA+8Fgwf8qxa3tPYnXlgjTrKpOG0uujMSOIFyyd/2p7Fae 495w== X-Gm-Message-State: ACgBeo2YENHamYrq9ZST36EpGk/UyaYKtqiTWRXSprIk0bqQDAXxFIoZ 9kMsBffgP+ST2OlZPbGsATuJjbh/ZGjN893p X-Received: by 2002:adf:fb84:0:b0:21a:10f2:1661 with SMTP id a4-20020adffb84000000b0021a10f21661mr26199751wrr.2.1662455493798; Tue, 06 Sep 2022 02:11:33 -0700 (PDT) Received: from localhost.localdomain ([2a02:8084:a5c0:5a80:ba98:3a71:8524:e0b1]) by smtp.gmail.com with ESMTPSA id m64-20020a1c2643000000b003a5ee64cc98sm20094193wmm.33.2022.09.06.02.11.32 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Sep 2022 02:11:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 3/7] accel/tcg: Do not align tb->page_addr[0] Date: Tue, 6 Sep 2022 10:11:22 +0100 Message-Id: <20220906091126.298041-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220906091126.298041-1-richard.henderson@linaro.org> References: <20220906091126.298041-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Let tb->page_addr[0] contain the offset within the page of the start of the translation block. We need to recover this value anyway at various points, and it is easier to discard the page offset when it's not needed, which happens naturally via the existing find_page shift. Signed-off-by: Richard Henderson --- accel/tcg/cpu-exec.c | 16 ++++++++-------- accel/tcg/cputlb.c | 3 ++- accel/tcg/translate-all.c | 9 +++++---- 3 files changed, 15 insertions(+), 13 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 5f43b9769a..dd58a144a8 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -174,7 +174,7 @@ struct tb_desc { target_ulong pc; target_ulong cs_base; CPUArchState *env; - tb_page_addr_t phys_page1; + tb_page_addr_t page_addr0; uint32_t flags; uint32_t cflags; uint32_t trace_vcpu_dstate; @@ -186,7 +186,7 @@ static bool tb_lookup_cmp(const void *p, const void *d) const struct tb_desc *desc = d; if (tb->pc == desc->pc && - tb->page_addr[0] == desc->phys_page1 && + tb->page_addr[0] == desc->page_addr0 && tb->cs_base == desc->cs_base && tb->flags == desc->flags && tb->trace_vcpu_dstate == desc->trace_vcpu_dstate && @@ -195,8 +195,8 @@ static bool tb_lookup_cmp(const void *p, const void *d) if (tb->page_addr[1] == -1) { return true; } else { - tb_page_addr_t phys_page2; - target_ulong virt_page2; + tb_page_addr_t phys_page1; + target_ulong virt_page1; /* * We know that the first page matched, and an otherwise valid TB @@ -207,9 +207,9 @@ static bool tb_lookup_cmp(const void *p, const void *d) * is different for the new TB. Therefore any exception raised * here by the faulting lookup is not premature. */ - virt_page2 = TARGET_PAGE_ALIGN(desc->pc); - phys_page2 = get_page_addr_code(desc->env, virt_page2); - if (tb->page_addr[1] == phys_page2) { + virt_page1 = TARGET_PAGE_ALIGN(desc->pc); + phys_page1 = get_page_addr_code(desc->env, virt_page1); + if (tb->page_addr[1] == phys_page1) { return true; } } @@ -235,7 +235,7 @@ static TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, if (phys_pc == -1) { return NULL; } - desc.phys_page1 = phys_pc & TARGET_PAGE_MASK; + desc.page_addr0 = phys_pc; h = tb_hash_func(phys_pc, pc, flags, cflags, *cpu->trace_dstate); return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp); } diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 3a3549ad4a..ac4442ee8d 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -951,7 +951,8 @@ void tlb_flush_page_bits_by_mmuidx_all_cpus_synced(CPUState *src_cpu, can be detected */ void tlb_protect_code(ram_addr_t ram_addr) { - cpu_physical_memory_test_and_clear_dirty(ram_addr, TARGET_PAGE_SIZE, + cpu_physical_memory_test_and_clear_dirty(ram_addr & TARGET_PAGE_MASK, + TARGET_PAGE_SIZE, DIRTY_MEMORY_CODE); } diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index d2946f8e59..d1f478d836 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1186,7 +1186,7 @@ static void do_tb_phys_invalidate(TranslationBlock *tb, bool rm_from_page_list) qemu_spin_unlock(&tb->jmp_lock); /* remove the TB from the hash list */ - phys_pc = tb->page_addr[0] + (tb->pc & ~TARGET_PAGE_MASK); + phys_pc = tb->page_addr[0]; h = tb_hash_func(phys_pc, tb->pc, tb->flags, orig_cflags, tb->trace_vcpu_dstate); if (!qht_remove(&tb_ctx.htable, tb, h)) { @@ -1342,7 +1342,7 @@ tb_link_page(TranslationBlock *tb, tb_page_addr_t phys_pc, * we can only insert TBs that are fully initialized. */ page_lock_pair(&p, phys_pc, &p2, phys_page2, true); - tb_page_add(p, tb, 0, phys_pc & TARGET_PAGE_MASK); + tb_page_add(p, tb, 0, phys_pc); if (p2) { tb_page_add(p2, tb, 1, phys_page2); } else { @@ -1697,11 +1697,12 @@ tb_invalidate_phys_page_range__locked(struct page_collection *pages, if (n == 0) { /* NOTE: tb_end may be after the end of the page, but it is not a problem */ - tb_start = tb->page_addr[0] + (tb->pc & ~TARGET_PAGE_MASK); + tb_start = tb->page_addr[0]; tb_end = tb_start + tb->size; } else { tb_start = tb->page_addr[1]; - tb_end = tb_start + ((tb->pc + tb->size) & ~TARGET_PAGE_MASK); + tb_end = tb_start + ((tb->page_addr[0] + tb->size) + & ~TARGET_PAGE_MASK); } if (!(tb_end <= start || tb_start >= end)) { #ifdef TARGET_HAS_PRECISE_SMC