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([2602:47:d49d:ec01:bbf3:9914:aa9c:3b4e]) by smtp.gmail.com with ESMTPSA id g184-20020a6252c1000000b00535d19c46d7sm2199904pfb.203.2022.08.18.20.26.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Aug 2022 20:26:31 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: laurent@vivier.eu, iii@linux.ibm.com, dramforever@live.com, alistair.francis@wdc.com, alex.bennee@linaro.org Subject: [PATCH v6 13/21] accel/tcg: Add nofault parameter to get_page_addr_code_hostp Date: Thu, 18 Aug 2022 20:26:07 -0700 Message-Id: <20220819032615.884847-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220819032615.884847-1-richard.henderson@linaro.org> References: <20220819032615.884847-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson Reviewed-by: Alistair Francis --- include/exec/exec-all.h | 10 +++++----- accel/tcg/cputlb.c | 8 ++++---- accel/tcg/plugin-gen.c | 4 ++-- accel/tcg/user-exec.c | 4 ++-- 4 files changed, 13 insertions(+), 13 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 9f35e3b7a9..7a6dc44d86 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -599,6 +599,8 @@ struct MemoryRegionSection *iotlb_to_section(CPUState *cpu, * get_page_addr_code_hostp() * @env: CPUArchState * @addr: guest virtual address of guest code + * @nofault: do not raise an exception + * @hostp: output for host pointer * * See get_page_addr_code() (full-system version) for documentation on the * return value. @@ -607,10 +609,10 @@ struct MemoryRegionSection *iotlb_to_section(CPUState *cpu, * If the return value is -1, sets *@hostp to NULL. Otherwise, sets *@hostp * to the host address where @addr's content is kept. * - * Note: this function can trigger an exception. + * Note: Unless @nofault, this function can trigger an exception. */ tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong addr, - void **hostp); + bool nofault, void **hostp); /** * get_page_addr_code() @@ -620,13 +622,11 @@ tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong addr, * If we cannot translate and execute from the entire RAM page, or if * the region is not backed by RAM, returns -1. Otherwise, returns the * ram_addr_t corresponding to the guest code at @addr. - * - * Note: this function can trigger an exception. */ static inline tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) { - return get_page_addr_code_hostp(env, addr, NULL); + return get_page_addr_code_hostp(env, addr, true, NULL); } #if defined(CONFIG_USER_ONLY) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 2dc2affa12..ae7b40dd51 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1644,16 +1644,16 @@ void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, * of RAM. This will force us to execute by loading and translating * one insn at a time, without caching. * - * NOTE: This function will trigger an exception if the page is - * not executable. + * NOTE: Unless @nofault, this function will trigger an exception + * if the page is not executable. */ tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong addr, - void **hostp) + bool nofault, void **hostp) { void *p; (void)probe_access_internal(env, addr, 1, MMU_INST_FETCH, - cpu_mmu_index(env, true), true, &p, 0); + cpu_mmu_index(env, true), nofault, &p, 0); if (p == NULL) { return -1; } diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 3d0b101e34..8377c15383 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -872,7 +872,7 @@ bool plugin_gen_tb_start(CPUState *cpu, const TranslationBlock *tb, bool mem_onl ptb->vaddr = tb->pc; ptb->vaddr2 = -1; - get_page_addr_code_hostp(cpu->env_ptr, tb->pc, &ptb->haddr1); + get_page_addr_code_hostp(cpu->env_ptr, tb->pc, true, &ptb->haddr1); ptb->haddr2 = NULL; ptb->mem_only = mem_only; @@ -902,7 +902,7 @@ void plugin_gen_insn_start(CPUState *cpu, const DisasContextBase *db) unlikely((db->pc_next & TARGET_PAGE_MASK) != (db->pc_first & TARGET_PAGE_MASK))) { get_page_addr_code_hostp(cpu->env_ptr, db->pc_next, - &ptb->haddr2); + true, &ptb->haddr2); ptb->vaddr2 = db->pc_next; } if (likely(ptb->vaddr2 == -1)) { diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 58edd33896..e7fec960c2 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -197,11 +197,11 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size, } tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong addr, - void **hostp) + bool nofault, void **hostp) { int flags; - flags = probe_access_internal(env, addr, 1, MMU_INST_FETCH, true, 0); + flags = probe_access_internal(env, addr, 1, MMU_INST_FETCH, nofault, 0); if (unlikely(flags)) { return -1; }