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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id m2-20020adffa02000000b0021d163daeb0sm13200228wrr.108.2022.06.30.12.41.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Jun 2022 12:41:24 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 3/5] target/arm: Suppress debug exceptions when OS Lock set Date: Thu, 30 Jun 2022 20:41:14 +0100 Message-Id: <20220630194116.3438513-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220630194116.3438513-1-peter.maydell@linaro.org> References: <20220630194116.3438513-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The "OS Lock" in the Arm debug architecture is a way for software to suppress debug exceptions while it is trying to power down a CPU and save the state of the breakpoint and watchpoint registers. In QEMU we implemented the support for writing the OS Lock bit via OSLAR_EL1 and reading it via OSLSR_EL1, but didn't implement the actual behaviour. The required behaviour with the OS Lock set is: * debug exceptions (apart from BKPT insns) are suppressed * some MDSCR_EL1 bits allow write access to the corresponding EDSCR external debug status register that they shadow (we can ignore this because we don't implement external debug) * similarly with the OSECCR_EL1 which shadows the EDECCR (but we don't implement OSECCR_EL1 anyway) Implement the missing behaviour of suppressing debug exceptions. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/debug_helper.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c index 9a78c1db966..691b9b74c4a 100644 --- a/target/arm/debug_helper.c +++ b/target/arm/debug_helper.c @@ -142,6 +142,9 @@ static bool aa32_generate_debug_exceptions(CPUARMState *env) */ bool arm_generate_debug_exceptions(CPUARMState *env) { + if (env->cp15.oslsr_el1 & 1) { + return false; + } if (is_a64(env)) { return aa64_generate_debug_exceptions(env); } else {