diff mbox series

[PULL,13/19] target/m68k: Implement TPF in terms of TRAPcc

Message ID 20220602115837.2013918-14-laurent@vivier.eu
State Accepted
Commit 815c6dea464c661032c6cc76f42160a6240c930e
Headers show
Series [PULL,01/19] target/m68k: Clear mach in m68k_cpu_disas_set_info | expand

Commit Message

Laurent Vivier June 2, 2022, 11:58 a.m. UTC
From: Richard Henderson <richard.henderson@linaro.org>

TPF stands for "trap false", and is a long-form nop for ColdFire.
Re-use the immediate consumption code from trapcc; the insn will
already expand to a nop because of the TCG_COND_NEVER test
within do_trapcc.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-12-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
 target/m68k/translate.c | 19 ++-----------------
 1 file changed, 2 insertions(+), 17 deletions(-)
diff mbox series

Patch

diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index e9aa96d7684b..8b2157c31f54 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -3075,22 +3075,6 @@  DISAS_INSN(addsubq)
     tcg_temp_free(dest);
 }
 
-DISAS_INSN(tpf)
-{
-    switch (insn & 7) {
-    case 2: /* One extension word.  */
-        s->pc += 2;
-        break;
-    case 3: /* Two extension words.  */
-        s->pc += 4;
-        break;
-    case 4: /* No extension words.  */
-        break;
-    default:
-        disas_undef(env, s, insn);
-    }
-}
-
 DISAS_INSN(branch)
 {
     int32_t offset;
@@ -6100,7 +6084,8 @@  void register_m68k_insns (CPUM68KState *env)
     INSN(dbcc,      50c8, f0f8, M68000);
     INSN(trapcc,    50fa, f0fe, TRAPCC);   /* opmode 010, 011 */
     INSN(trapcc,    50fc, f0ff, TRAPCC);   /* opmode 100 */
-    INSN(tpf,       51f8, fff8, CF_ISA_A);
+    INSN(trapcc,    51fa, fffe, CF_ISA_A); /* TPF (trapf) opmode 010, 011 */
+    INSN(trapcc,    51fc, ffff, CF_ISA_A); /* TPF (trapf) opmode 100 */
 
     /* Branch instructions.  */
     BASE(branch,    6000, f000);