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([2607:fb90:27d0:b0f2:934d:3e2:9f8c:dd1]) by smtp.gmail.com with ESMTPSA id 6-20020a17090a030600b001cd4989ff5fsm6835904pje.38.2022.04.22.09.53.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 09:53:38 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v8 33/68] target/nios2: Hoist CPU_LOG_INT logging Date: Fri, 22 Apr 2022 09:52:03 -0700 Message-Id: <20220422165238.1971496-34-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220422165238.1971496-1-richard.henderson@linaro.org> References: <20220422165238.1971496-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Performing this early means that we can merge more cases within the non-logging switch statement. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-Id: <20220421151735.31996-34-richard.henderson@linaro.org> --- target/nios2/helper.c | 58 +++++++++++++++++++++++++++++++++++-------- 1 file changed, 47 insertions(+), 11 deletions(-) diff --git a/target/nios2/helper.c b/target/nios2/helper.c index 63971a8b3c..c57ffd64e0 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -70,20 +70,64 @@ void nios2_cpu_do_interrupt(CPUState *cs) Nios2CPU *cpu = NIOS2_CPU(cs); CPUNios2State *env = &cpu->env; + if (qemu_loglevel_mask(CPU_LOG_INT)) { + const char *name = NULL; + + switch (cs->exception_index) { + case EXCP_IRQ: + name = "interrupt"; + break; + case EXCP_TLBD: + if (env->ctrl[CR_STATUS] & CR_STATUS_EH) { + name = "TLB MISS (double)"; + } else { + name = "TLB MISS (fast)"; + } + break; + case EXCP_TLBR: + case EXCP_TLBW: + case EXCP_TLBX: + name = "TLB PERM"; + break; + case EXCP_SUPERA: + case EXCP_SUPERD: + name = "SUPERVISOR (address)"; + break; + case EXCP_SUPERI: + name = "SUPERVISOR (insn)"; + break; + case EXCP_ILLEGAL: + name = "ILLEGAL insn"; + break; + case EXCP_TRAP: + name = "TRAP insn"; + break; + case EXCP_BREAK: + name = "BREAK insn"; + break; + case EXCP_SEMIHOST: + name = "SEMIHOST insn"; + break; + } + if (name) { + qemu_log("%s at pc=0x%08x\n", name, env->pc); + } else { + qemu_log("Unknown exception %d at pc=0x%08x\n", + cs->exception_index, env->pc); + } + } + switch (cs->exception_index) { case EXCP_IRQ: - qemu_log_mask(CPU_LOG_INT, "interrupt at pc=%x\n", env->pc); do_iic_irq(cpu); break; case EXCP_TLBD: if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) == 0) { - qemu_log_mask(CPU_LOG_INT, "TLB MISS (fast) at pc=%x\n", env->pc); env->ctrl[CR_TLBMISC] &= ~CR_TLBMISC_DBL; env->ctrl[CR_TLBMISC] |= CR_TLBMISC_WE; do_exception(cpu, cpu->fast_tlb_miss_addr, false); } else { - qemu_log_mask(CPU_LOG_INT, "TLB MISS (double) at pc=%x\n", env->pc); env->ctrl[CR_TLBMISC] |= CR_TLBMISC_DBL; do_exception(cpu, cpu->exception_addr, false); } @@ -92,7 +136,6 @@ void nios2_cpu_do_interrupt(CPUState *cs) case EXCP_TLBR: case EXCP_TLBW: case EXCP_TLBX: - qemu_log_mask(CPU_LOG_INT, "TLB PERM at pc=%x\n", env->pc); if ((env->ctrl[CR_STATUS] & CR_STATUS_EH) == 0) { env->ctrl[CR_TLBMISC] |= CR_TLBMISC_WE; } @@ -102,23 +145,16 @@ void nios2_cpu_do_interrupt(CPUState *cs) case EXCP_SUPERA: case EXCP_SUPERI: case EXCP_SUPERD: - qemu_log_mask(CPU_LOG_INT, "SUPERVISOR exception at pc=%x\n", env->pc); - do_exception(cpu, cpu->exception_addr, false); - break; - case EXCP_ILLEGAL: case EXCP_TRAP: - qemu_log_mask(CPU_LOG_INT, "TRAP exception at pc=%x\n", env->pc); do_exception(cpu, cpu->exception_addr, false); break; case EXCP_BREAK: - qemu_log_mask(CPU_LOG_INT, "BREAK exception at pc=%x\n", env->pc); do_exception(cpu, cpu->exception_addr, true); break; case EXCP_SEMIHOST: - qemu_log_mask(CPU_LOG_INT, "BREAK semihosting at pc=%x\n", env->pc); env->pc += 4; do_nios2_semihosting(env); break;