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Fri, 08 Apr 2022 09:47:49 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id BADBC1FFBD; Fri, 8 Apr 2022 17:47:43 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 05/15] accel/tcg: add tb_invalidate_phy_pages_fast tracepoint Date: Fri, 8 Apr 2022 17:47:32 +0100 Message-Id: <20220408164742.2844631-6-alex.bennee@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220408164742.2844631-1-alex.bennee@linaro.org> References: <20220408164742.2844631-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, stefanha@redhat.com, crosa@redhat.com, Richard Henderson , aaron@os.amperecomputing.com, robhenry@microsoft.com, f4bug@amsat.org, mahmoudabdalghany@outlook.com, minyihh@uci.edu, cota@braap.org, Luke.Craig@ll.mit.edu, pbonzini@redhat.com, kuhn.chenqun@huawei.com, ma.mandourr@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , aurelien@aurel32.net Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" These events can be very expensive for the translator so lets add a tracepoint to help with debugging what might be causing them. Clean up the comments while we are at it. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- accel/tcg/translate-all.c | 15 +++++++++++---- accel/tcg/trace-events | 1 + 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 5971cd53ab..e9f1cc179d 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1807,21 +1807,28 @@ void tb_invalidate_phys_range(target_ulong start, target_ulong end) } #ifdef CONFIG_SOFTMMU -/* len must be <= 8 and start must be a multiple of len. +/* + * len must be <= 8 and start must be a multiple of len. * Called via softmmu_template.h when code areas are written to with * iothread mutex not held. * - * Call with all @pages in the range [@start, @start + len[ locked. + * Call with all @pages in the range [@start, @start + len] locked. */ void tb_invalidate_phys_page_fast(struct page_collection *pages, tb_page_addr_t start, int len, uintptr_t retaddr) { - PageDesc *p; + PageDesc *p = page_find(start >> TARGET_PAGE_BITS); + + if (trace_event_get_state_backends(TRACE_TB_INVALIDATE_PHYS_PAGE_FAST)) { + TranslationBlock *tb = tcg_tb_lookup(retaddr); + g_assert(tb); + trace_tb_invalidate_phys_page_fast(start, len, tb->pc, + p->code_write_count, p->code_bitmap); + } assert_memory_lock(); - p = page_find(start >> TARGET_PAGE_BITS); if (!p) { return; } diff --git a/accel/tcg/trace-events b/accel/tcg/trace-events index 4e9b450520..f4d1321b1b 100644 --- a/accel/tcg/trace-events +++ b/accel/tcg/trace-events @@ -11,4 +11,5 @@ memory_notdirty_write_access(uint64_t vaddr, uint64_t ram_addr, unsigned size) " memory_notdirty_set_dirty(uint64_t vaddr) "0x%" PRIx64 # translate-all.c +tb_invalidate_phys_page_fast(uint64_t page_start, int len, uint64_t ret, int wc, void *bmap) "addr:0x%" PRIx64 "/%d pc:0x%" PRIx64" wc:%d/%p" translate_block(void *tb, uintptr_t pc, const void *tb_code) "tb:%p, pc:0x%"PRIxPTR", tb_code:%p"