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[189.204.159.168]) by smtp.gmail.com with ESMTPSA id r35-20020a056870582300b000df0dc42ff5sm2995208oap.0.2022.03.29.16.49.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Mar 2022 16:49:58 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-7.0?] tcg/aarch64: Use 'ull' suffix to force 64-bit constant Date: Tue, 29 Mar 2022 17:49:56 -0600 Message-Id: <20220329234956.43558-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::329 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::329; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x329.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Typo used only 'ul' suffix, which is still 32-bits for windows host. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/947 Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell --- tcg/aarch64/tcg-target.c.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 077fc51401..5e67f881f1 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -1086,9 +1086,9 @@ static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg rd, opc = I3405_MOVZ; } s0 = ctz64(t0) & (63 & -16); - t1 = t0 & ~(0xffffUL << s0); + t1 = t0 & ~(0xffffull << s0); s1 = ctz64(t1) & (63 & -16); - t2 = t1 & ~(0xffffUL << s1); + t2 = t1 & ~(0xffffull << s1); if (t2 == 0) { tcg_out_insn_3405(s, opc, type, rd, t0 >> s0, s0); if (t1 != 0) {