diff mbox series

[for-7.1,v6,02/51] target/nios2: Check supervisor on eret

Message ID	20220317050538.924111-3-richard.henderson@linaro.org
State	Superseded
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Subject: [PATCH for-7.1 v6 02/51] target/nios2: Check supervisor on eret Date: Wed, 16 Mar 2022 22:04:49 -0700 Message-Id: <20220317050538.924111-3-richard.henderson@linaro.org> In-Reply-To: <20220317050538.924111-1-richard.henderson@linaro.org> References: <20220317050538.924111-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1036.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action Precedence: list Cc: marex@denx.de, Peter Maydell <peter.maydell@linaro.org>, amir.gonnen@neuroblade.ai Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>
Series	target/nios2: Shadow register set, EIC and VIC \| expand [for-7.1,v6,00/51] target/nios2: Shadow register set, EIC and VIC [for-7.1,v6,01/51] tcg: Fix indirect lowering vs TCG_OPF_COND_BRANCH [for-7.1,v6,02/51] target/nios2: Check supervisor on eret [for-7.1,v6,03/51] target/nios2: Stop generating code if gen_check_supervisor fails [for-7.1,v6,04/51] target/nios2: Add NUM_GP_REGS and NUM_CP_REGS [for-7.1,v6,05/51] target/nios2: Split PC out of env->regs[] [for-7.1,v6,06/51] target/nios2: Split out helper for eret instruction [for-7.1,v6,07/51] target/nios2: Fix BRET instruction [for-7.1,v6,08/51] target/nios2: Do not create TCGv for control registers [for-7.1,v6,09/51] linux-user/nios2: Only initialize SP and PC in target_cpu_copy_regs [for-7.1,v6,10/51] target/nios2: Remove cpu_interrupts_enabled [for-7.1,v6,11/51] target/nios2: Split control registers away from general registers [for-7.1,v6,12/51] target/nios2: Clean up nios2_cpu_dump_state [for-7.1,v6,13/51] target/nios2: Use hw/registerfields.h for CR_STATUS fields [for-7.1,v6,14/51] target/nios2: Use hw/registerfields.h for CR_EXCEPTION fields [for-7.1,v6,15/51] target/nios2: Use hw/registerfields.h for CR_TLBADDR fields [for-7.1,v6,16/51] target/nios2: Use hw/registerfields.h for CR_TLBACC fields [for-7.1,v6,17/51] target/nios2: Rename CR_TLBMISC_WR to CR_TLBMISC_WE [for-7.1,v6,18/51] target/nios2: Use hw/registerfields.h for CR_TLBMISC fields [for-7.1,v6,19/51] target/nios2: Move R_FOO and CR_BAR into enumerations [for-7.1,v6,20/51] target/nios2: Create EXCP_SEMIHOST for semi-hosting [for-7.1,v6,21/51] target/nios2: Clean up nios2_cpu_do_interrupt [for-7.1,v6,22/51] target/nios2: Hoist CPU_LOG_INT logging [for-7.1,v6,23/51] target/nios2: Handle EXCP_UNALIGN and EXCP_UALIGND [for-7.1,v6,24/51] target/nios2: Cleanup set of CR_EXCEPTION for do_interrupt [for-7.1,v6,25/51] target/nios2: Clean up handling of tlbmisc in do_exception [for-7.1,v6,26/51] target/nios2: Prevent writes to read-only or reserved control fields [for-7.1,v6,27/51] target/nios2: Implement cpuid [for-7.1,v6,28/51] target/nios2: Implement CR_STATUS.RSIE [for-7.1,v6,29/51] target/nios2: Remove CPU_INTERRUPT_NMI [for-7.1,v6,30/51] target/nios2: Support division error exception [for-7.1,v6,31/51] target/nios2: Use tcg_constant_tl [for-7.1,v6,32/51] target/nios2: Introduce dest_gpr [for-7.1,v6,33/51] target/nios2: Drop CR_STATUS_EH from tb->flags [for-7.1,v6,34/51] target/nios2: Enable unaligned traps for system mode [for-7.1,v6,35/51] target/nios2: Create gen_jumpr [for-7.1,v6,36/51] target/nios2: Hoist set of is_jmp into gen_goto_tb [for-7.1,v6,37/51] target/nios2: Use gen_goto_tb for DISAS_TOO_MANY [for-7.1,v6,38/51] target/nios2: Use tcg_gen_lookup_and_goto_ptr [for-7.1,v6,39/51] target/nios2: Implement Misaligned destination exception [for-7.1,v6,40/51] linux-user/nios2: Handle various SIGILL exceptions [for-7.1,v6,41/51] target/nios2: Introduce shadow register sets [for-7.1,v6,42/51] target/nios2: Implement rdprs, wrprs [for-7.1,v6,43/51] target/nios2: Update helper_eret for shadow registers [for-7.1,v6,44/51] target/nios2: Implement EIC interrupt processing [for-7.1,v6,45/51] hw/intc: Vectored Interrupt Controller (VIC) [for-7.1,v6,46/51] hw/nios2: Introduce Nios2MachineState [for-7.1,v6,47/51] hw/nios2: Move memory regions into Nios2Machine [for-7.1,v6,48/51] hw/nios2: Machine with a Vectored Interrupt Controller [for-7.1,v6,49/51] tests/tcg: Expose AR to test build environment if needed [for-7.1,v6,50/51] test/tcg/nios2: Add semihosting multiarch tests [for-7.1,v6,51/51] tests/tcg/nios2: Add test-shadow-1

Commit Message

Richard Henderson March 17, 2022, 5:04 a.m. UTC

From: Amir Gonnen <amir.gonnen@neuroblade.ai>

eret instruction is only allowed in supervisor mode.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Amir Gonnen <amir.gonnen@neuroblade.ai>
Message-Id: <20220303153906.2024748-2-amir.gonnen@neuroblade.ai>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/nios2/translate.c | 2 ++
 1 file changed, 2 insertions(+)

diff mbox series

Patch

diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index f89271dbed..341f3a8273 100644
--- a/target/nios2/translate.c
+++ b/target/nios2/translate.c
@@ -384,6 +384,8 @@  static const Nios2Instruction i_type_instructions[] = {
  */
 static void eret(DisasContext *dc, uint32_t code, uint32_t flags)
 {
+    gen_check_supervisor(dc);
+
     tcg_gen_mov_tl(cpu_R[CR_STATUS], cpu_R[CR_ESTATUS]);
     tcg_gen_mov_tl(cpu_R[R_PC], cpu_R[R_EA]);