From patchwork Thu Mar 3 20:59:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 547825 Delivered-To: patch@linaro.org Received: by 2002:ac0:f585:0:0:0:0:0 with SMTP id s5csp985101imq; Thu, 3 Mar 2022 13:13:00 -0800 (PST) X-Google-Smtp-Source: ABdhPJwk6G4ND/YQBIwRbrbWJxvbUo9Dbqf42djRi4a/OZ7usX4YEUFvJQj+YEbqjarrqqgj2TO+ X-Received: by 2002:a81:3544:0:b0:2dc:2cf:6bab with SMTP id c65-20020a813544000000b002dc02cf6babmr12062727ywa.369.1646341979932; Thu, 03 Mar 2022 13:12:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1646341979; cv=none; d=google.com; s=arc-20160816; b=0yXkC1vcckm3V0U0IAzGfU7I8kyB4JXmYkqgKRcbRY6+UV1c7JDS2Rd6DqLFqFuG4j tVMIILTzBo2h1eIG4UPXKS73WrWtURfZNfrimfCUQCfOVxIlwVR+cOqMkugEtlTNyzBP GWMB83xupROlNZ5OlTmnEW6n0xS6eWMIt1ejk4h16cJNLPt596FV3/+NeaSwuEPA0qBt pu/uCU27RZMUqGx7nIB2R/Kxl0tiF0HoQs3k4juFwJLnGM8R6wsdIcKsiUi/AG0DBsDk ue7RZ29PtToP6VJ+2Z/Bn7Zlf3+sMWtXXb135DubdAbWXQpGGY4gPimUNNQXQ5I4tMTe FKmg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=cv8rekvHfXBD5FgVr8FJHUh95M1X519FeesHcglTBx4=; b=JeSUHj+UZBMivTyo16ZViC42+QSS/u5DXBkSz4o/4Bo/iMDt6xKwFvuAPnflf9d6Pr Wmtz0+L9kVoawvWmlDuczHD9zcuBpIW5jXZYanF1ahmqqbMxMxJfU+BBTvhrTdFa4Wi3 CSjYqHZ/nWadUJGUljUfCcVzF7CpCA7O1pLzKEHojTGr9KiMiOCrmYCXHjrpjDPPfLUg kz1mjZCyMHbxVNfJr2O5hnOX9WMRTJvRYZDufSu+SqTDRzK8XZeLQL3zIfR2dM7IdH1x SeGzrQDB9I9bOKStDRavMRyiBx88jAzRuwkxqnqr4u6JcE03aB0EsWvE4rVL0y8RHvyK dxLQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uzfPR0qp; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id h1-20020a81f101000000b002dc0e2e9416si2857855ywm.395.2022.03.03.13.12.59 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Mar 2022 13:12:59 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uzfPR0qp; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:59034 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPskt-0003pB-BS for patch@linaro.org; Thu, 03 Mar 2022 16:12:59 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58940) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPsYP-0005qj-7w for qemu-devel@nongnu.org; Thu, 03 Mar 2022 16:00:05 -0500 Received: from [2607:f8b0:4864:20::1033] (port=53963 helo=mail-pj1-x1033.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPsYN-00045o-GS for qemu-devel@nongnu.org; Thu, 03 Mar 2022 16:00:04 -0500 Received: by mail-pj1-x1033.google.com with SMTP id bx5so5698525pjb.3 for ; Thu, 03 Mar 2022 13:00:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cv8rekvHfXBD5FgVr8FJHUh95M1X519FeesHcglTBx4=; b=uzfPR0qpizS1A51wbNF03Sbn7UdEEGWLGH24UK6l6c+wF08lfZcIQcrlZso333Q6A+ BUPk6qyTwQLNy8Fro6juhElwrj2PPg+GjD5h/qVu42VPVNvs96ItMaOZalc0ymZ9seEH aKKZv0ykeQkX3tbSHDYxIpXUo4B4s0BI0SRTuk4GM1aMN0M0Z9v5sWjVT7ZM1gnAR0ce WaPHlkMwNt4TFJV3MfXFSA62jkPStdI6eXdEH//ZHMWwJ6xRcUwHxnFwGsuMKRynrl/q Zz5CNsxfIUstRTLDiUZhZoloYjVP7i2h9uK5+TDRBcvNne9Lezxb2PLKNDCl/hZOYVUw mK0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cv8rekvHfXBD5FgVr8FJHUh95M1X519FeesHcglTBx4=; b=n4M2OhMz/FjNy9PmJDdQ+zNc2gJ2mjVU6mAB7a6CR0zprhmFa5/odacOlZ3ySS/iXV rX97b5CDEtu40NolQac/DJvxdbquP5q0+GHVXnIvSvVSmDrLjePgX0gqeSTHFlrM2LMu psyGM19zd6R6zU6fDgBeqgvwsXGZanpbP58btB1o3Cv2OwFfHfHFJDuMrMmEpGD4A6Iz sGzYSMLFfr1ySC0CSVnJXecmfVOI14HKH4Hqq+7249JStJRdzPPA5UXDY2lw9Og6Ndia AclMLJUqXYqrVRSQWPPzl3YVf97QBMq3oeVtTWzUP7uFR76CbToFOGwXVC3ABTPuo6s2 E4UQ== X-Gm-Message-State: AOAM530d9+lpBL7Rvh31WOuPaNdu0fUADl4VEd99P3VgFhB2jmpqrnAK 9znPsgRjCErYu2sONyqy6dTU0CtuTd+9gw== X-Received: by 2002:a17:902:b692:b0:14c:935b:2b03 with SMTP id c18-20020a170902b69200b0014c935b2b03mr38395485pls.81.1646341201182; Thu, 03 Mar 2022 13:00:01 -0800 (PST) Received: from localhost.localdomain (2603-800c-1201-c600-119c-490c-a4ee-08e8.res6.spectrum.com. [2603:800c:1201:c600:119c:490c:a4ee:8e8]) by smtp.gmail.com with ESMTPSA id t8-20020a6549c8000000b00372eb3a7fb3sm2729934pgs.92.2022.03.03.12.59.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Mar 2022 13:00:00 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 09/30] tcg/i386: Implement avx512 variable shifts Date: Thu, 3 Mar 2022 10:59:23 -1000 Message-Id: <20220303205944.469445-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220303205944.469445-1-richard.henderson@linaro.org> References: <20220303205944.469445-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1033 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" AVX512VL has VPSRAVQ, and AVX512BW has VPSLLVW, VPSRAVW, VPSRLVW. Tested-by: Alex Bennée Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 32 ++++++++++++++++++++++++-------- 1 file changed, 24 insertions(+), 8 deletions(-) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index 6a53f378cc..055db88422 100644 --- a/tcg/i386/tcg-target.c.inc +++ b/tcg/i386/tcg-target.c.inc @@ -419,9 +419,13 @@ static bool tcg_target_const_match(int64_t val, TCGType type, int ct) #define OPC_VPBROADCASTQ (0x59 | P_EXT38 | P_DATA16) #define OPC_VPERMQ (0x00 | P_EXT3A | P_DATA16 | P_VEXW) #define OPC_VPERM2I128 (0x46 | P_EXT3A | P_DATA16 | P_VEXL) +#define OPC_VPSLLVW (0x12 | P_EXT38 | P_DATA16 | P_VEXW | P_EVEX) #define OPC_VPSLLVD (0x47 | P_EXT38 | P_DATA16) #define OPC_VPSLLVQ (0x47 | P_EXT38 | P_DATA16 | P_VEXW) +#define OPC_VPSRAVW (0x11 | P_EXT38 | P_DATA16 | P_VEXW | P_EVEX) #define OPC_VPSRAVD (0x46 | P_EXT38 | P_DATA16) +#define OPC_VPSRAVQ (0x46 | P_EXT38 | P_DATA16 | P_VEXW | P_EVEX) +#define OPC_VPSRLVW (0x10 | P_EXT38 | P_DATA16 | P_VEXW | P_EVEX) #define OPC_VPSRLVD (0x45 | P_EXT38 | P_DATA16) #define OPC_VPSRLVQ (0x45 | P_EXT38 | P_DATA16 | P_VEXW) #define OPC_VZEROUPPER (0x77 | P_EXT) @@ -2835,16 +2839,13 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, OPC_PMAXUB, OPC_PMAXUW, OPC_PMAXUD, OPC_UD2 }; static int const shlv_insn[4] = { - /* TODO: AVX512 adds support for MO_16. */ - OPC_UD2, OPC_UD2, OPC_VPSLLVD, OPC_VPSLLVQ + OPC_UD2, OPC_VPSLLVW, OPC_VPSLLVD, OPC_VPSLLVQ }; static int const shrv_insn[4] = { - /* TODO: AVX512 adds support for MO_16. */ - OPC_UD2, OPC_UD2, OPC_VPSRLVD, OPC_VPSRLVQ + OPC_UD2, OPC_VPSRLVW, OPC_VPSRLVD, OPC_VPSRLVQ }; static int const sarv_insn[4] = { - /* TODO: AVX512 adds support for MO_16, MO_64. */ - OPC_UD2, OPC_UD2, OPC_VPSRAVD, OPC_UD2 + OPC_UD2, OPC_VPSRAVW, OPC_VPSRAVD, OPC_VPSRAVQ }; static int const shls_insn[4] = { OPC_UD2, OPC_PSLLW, OPC_PSLLD, OPC_PSLLQ @@ -3335,9 +3336,24 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece) case INDEX_op_shlv_vec: case INDEX_op_shrv_vec: - return have_avx2 && vece >= MO_32; + switch (vece) { + case MO_16: + return have_avx512bw; + case MO_32: + case MO_64: + return have_avx2; + } + return 0; case INDEX_op_sarv_vec: - return have_avx2 && vece == MO_32; + switch (vece) { + case MO_16: + return have_avx512bw; + case MO_32: + return have_avx2; + case MO_64: + return have_avx512vl; + } + return 0; case INDEX_op_rotlv_vec: case INDEX_op_rotrv_vec: return have_avx2 && vece >= MO_32 ? -1 : 0;