From patchwork Thu Mar 3 20:23:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 547807 Delivered-To: patch@linaro.org Received: by 2002:ac0:f585:0:0:0:0:0 with SMTP id s5csp954632imq; Thu, 3 Mar 2022 12:27:09 -0800 (PST) X-Google-Smtp-Source: ABdhPJwqPlddvgqUtNKaTOTq9Q6PpZ2YteE1wyA8KtS7Dn/dAdmO+mJIIAL3gUo7V+oseBMhRep/ X-Received: by 2002:a81:a748:0:b0:2d6:1f8b:23a9 with SMTP id e69-20020a81a748000000b002d61f8b23a9mr36906491ywh.329.1646339229680; Thu, 03 Mar 2022 12:27:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1646339229; cv=none; d=google.com; s=arc-20160816; b=YTb/BKyhkg1Ee+K8G/6M7ZLAGmTnzeu+OxOpKwS22bee3JJxFj8uqAzJ2a3SwANiUi j0Q7wmnNtBciY1k0jInUkWhN09CfaXq49iQ19zSnFV1EmaJxrbg278PFxOHSqZGL/LAo KBeefcKkSaAbZv9dJWu5/my3GnxcQCLMyHeW9tELaPGx4IQ3ige4WUrFwcs7FYHg+Ofe Tw8VJ0m0CeJrf+YMFJ/iXT/wkLtSk3Q5pZ2x1GUf9p3mardl6WV3BiJ/mDxtNR+pddwT H76zCa61JIqRFtzTTf5MWjYx0n+Ax0dyVWAFaJxdo7vIe7p2APhpG9lqtck553FKWowz uk5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=uXh/JEg5Ojwyym5i/HIshpVVO/CoNEWjAFuxDcAMKaM=; b=Ie9IPc6HpBWeqlCKceuWouOztP1r0xavR/Bqa1x7+2yErTurDq/8h89aM6vsU3AhwI TTd38xwLfxE5Gb+gE8kUuPdjhMBSsw7szhB8IaT0a81879sT3HyJ4kDifykBQ7QfS7d9 LcDQio4ZnHNGxkSJtAmo+3oU22BXfXGSL29RQaXnBt49YMVLVxH6RWCcSpX2ortYvy55 ytEvTGdRY5BiS+Oi7Zp6taFVDp9WrxnY3O5pfqwu0aQsZGdkIjZruRES1oMLo8H2l8sn UQu2J6Gl0OLD1eKp5zDCKhim6TXiNBg3I0Dy8o3G+N/HRNhNomQIVZzTcdsdZl3D49qz L+bg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=t0kvC9pL; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id bu11-20020a056902090b00b006287d01649bsi2765125ybb.393.2022.03.03.12.27.09 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Mar 2022 12:27:09 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=t0kvC9pL; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:40356 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nPs2X-0007X5-5h for patch@linaro.org; Thu, 03 Mar 2022 15:27:09 -0500 Received: from eggs.gnu.org ([209.51.188.92]:49316) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nPrzL-0001wV-WE for qemu-devel@nongnu.org; Thu, 03 Mar 2022 15:23:52 -0500 Received: from [2a00:1450:4864:20::32b] (port=38868 helo=mail-wm1-x32b.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nPrzK-0001aF-97 for qemu-devel@nongnu.org; Thu, 03 Mar 2022 15:23:51 -0500 Received: by mail-wm1-x32b.google.com with SMTP id m42-20020a05600c3b2a00b00382ab337e14so4821838wms.3 for ; Thu, 03 Mar 2022 12:23:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=uXh/JEg5Ojwyym5i/HIshpVVO/CoNEWjAFuxDcAMKaM=; b=t0kvC9pLVwUMkJQ4I3iU4/DxiKZBqLj20I4aoau3o5xkZgwlCdfX2ZlTIRvHvQwfRF tEXJNPIWlWRJcBMltI6ueZSYuuCT7tVlUjbP3SlIa9GujD92TkSOqPa7v5Tm5/MBSgVY DGksTdMhOuabrknUVRT9F83S3AkafioBQ5FrGy0ntl7myl/8+ossWuhBMkygXHGeOO70 NCEcExPJsnysQrkDrn2zAiAYyPF3w4vih+wWdCWsCB/CeC2EvvU9TfNXh0dRWuuccbwD 5By4sgoegm2ZepJ6fO1e6Stf9H225tjpqPqIESF7nAJ73CAvYhgzSC1K/KEI8pvlkg1Q cqWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uXh/JEg5Ojwyym5i/HIshpVVO/CoNEWjAFuxDcAMKaM=; b=mPnpumG5JlbfBE/F/v/M8JybwnX47+RhKl0BVy8LyCcBqWThFyuqKzzELzhfgY3VOe U/QHohWWqav1EjMy0hktk0r1u36MsK+/4qs+/9bsvvMxFw/7gjpM55phlTZje4HsnT4Z o7DrXT8o0V5nvFHyPfM1YnJ/KAj31M5jWJPAI6Q/+l25sKEtWHr95S1Efm9B2EIr6Kqm 40Wc9+VhgzNw3QCyA8JN3KWhxo37yXzhd47OtGc7Djjt3+cDNVmBLHKXmt2aZMQJl/wO kO45wCENRdO4YFcYOKF5fu9T9q818zRFlXlzgHUoHEfpAoIvyBX4xtCSi/1iOc7QtCe+ 4vGw== X-Gm-Message-State: AOAM533x463fi4uC8LiL5D3FlXsfQm2bRF/7lNRa2D424cWTHDw2vggw Se0xn7cEO+R3uaKr6dKlpNlsjwKN1LbAiw== X-Received: by 2002:a7b:c347:0:b0:37e:68e6:d85c with SMTP id l7-20020a7bc347000000b0037e68e6d85cmr5022675wmj.176.1646339027932; Thu, 03 Mar 2022 12:23:47 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id t5-20020adff045000000b001f0684c3404sm517060wro.11.2022.03.03.12.23.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Mar 2022 12:23:47 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 4/5] hw/intc/arm_gicv3: Fix missing spaces in error log messages Date: Thu, 3 Mar 2022 20:23:40 +0000 Message-Id: <20220303202341.2232284-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220303202341.2232284-1-peter.maydell@linaro.org> References: <20220303202341.2232284-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::32b (failed) Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We forgot a space in some log messages, so the output ended up looking like gicv3_dist_write: invalid guest write at offset 0000000000008000size 8 with a missing space before "size". Add the missing spaces. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/intc/arm_gicv3_dist.c | 4 ++-- hw/intc/arm_gicv3_its.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/intc/arm_gicv3_dist.c b/hw/intc/arm_gicv3_dist.c index 4164500ea96..28d913b2114 100644 --- a/hw/intc/arm_gicv3_dist.c +++ b/hw/intc/arm_gicv3_dist.c @@ -838,7 +838,7 @@ MemTxResult gicv3_dist_read(void *opaque, hwaddr offset, uint64_t *data, if (!r) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid guest read at offset " TARGET_FMT_plx - "size %u\n", __func__, offset, size); + " size %u\n", __func__, offset, size); trace_gicv3_dist_badread(offset, size, attrs.secure); /* The spec requires that reserved registers are RAZ/WI; * so use MEMTX_ERROR returns from leaf functions as a way to @@ -879,7 +879,7 @@ MemTxResult gicv3_dist_write(void *opaque, hwaddr offset, uint64_t data, if (!r) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid guest write at offset " TARGET_FMT_plx - "size %u\n", __func__, offset, size); + " size %u\n", __func__, offset, size); trace_gicv3_dist_badwrite(offset, data, size, attrs.secure); /* The spec requires that reserved registers are RAZ/WI; * so use MEMTX_ERROR returns from leaf functions as a way to diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 9f4df6a8cbb..b96b874afdf 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -1313,7 +1313,7 @@ static MemTxResult gicv3_its_read(void *opaque, hwaddr offset, uint64_t *data, if (!result) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid guest read at offset " TARGET_FMT_plx - "size %u\n", __func__, offset, size); + " size %u\n", __func__, offset, size); trace_gicv3_its_badread(offset, size); /* * The spec requires that reserved registers are RAZ/WI; @@ -1349,7 +1349,7 @@ static MemTxResult gicv3_its_write(void *opaque, hwaddr offset, uint64_t data, if (!result) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid guest write at offset " TARGET_FMT_plx - "size %u\n", __func__, offset, size); + " size %u\n", __func__, offset, size); trace_gicv3_its_badwrite(offset, data, size); /* * The spec requires that reserved registers are RAZ/WI;