From patchwork Wed Feb 23 22:31:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 545221 X-Google-Smtp-Source: ABdhPJwWPi7UgWVXOWxZS1gCRvu8UrQUml/M29S/funYTz3AM2c8e1Oy27IgtcT6+mxixjCWGHCz X-Received: by 2002:a05:620a:1103:b0:60d:e5c8:a597 with SMTP id o3-20020a05620a110300b0060de5c8a597mr1256976qkk.513.1645655908936; Wed, 23 Feb 2022 14:38:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1645655908; cv=none; d=google.com; s=arc-20160816; b=r5/TN62nEkkedxjEgJ7iHeKPoP6afKDSpIy/s0S5Za0GD0/4oZihYxuQZPlVsxHQGw zCaRSlrneOIh4lx5pagcykyxhKPsKLnaOJIL5Maas1cTnajT8QoM1mF7BN/KCNYyzrD7 6N5FADUgwWwv/3gw9AfyDTRjwHkqUGTPHSAviPqwS6wbObeN3WfGKMUp4YZ3miBwGUsb 8JRHmNwYhGI6OpuOjftJ3R9KvogGXuvJbaHd3KHPQKIK74zEXC6rf2Tvtu8nJX/KZH2N H5KC/Q+zWUgzDOhhLCZ7hxXcIEFCPh1/xMb6AKPSDucYiaSzYiiV5JsGiNv1QQSAXvam nkQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=8FniAxzNq9R5C3PUa8crK2rtgbWJQ/YT25+L7bxil2U=; b=dxiWofykPU0q44G/yB8cDHe7l51K0BInHz0yhhe6GJY/O3UL6k1yRz00bTlxkkfVZt 5QDoPq2Q03A1lVBOV3jEAXCjWVMUAuEPNGPmQId9c6GUCTdKl9U0gzxvnGf6iA3eZQ/p KF0jxiZNUR0/ML94X7CdzfQYQt08//KOMnofAviryIciNwfBM/pTmB0OXswyUwjz0Ed6 bS3juhjAlyX3cXvWTJ/0imfmBJWoITAgWM+/HLy9YXalBHkJYVYO/Jn8Ndmo0o8A3ofM 7OG+rSh2ScVDOgQXo+AXV4Pjd8ZvGZcj1ryn3wDMAU/keQ7gRdCCAmBT15wDWeQFxhP1 KcQA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=mMRtQwqR; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id o16si614868qta.491.2022.02.23.14.38.28 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 23 Feb 2022 14:38:28 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=mMRtQwqR; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:47404 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nN0HE-0001T4-Fk for patch@linaro.org; Wed, 23 Feb 2022 17:38:28 -0500 Received: from eggs.gnu.org ([209.51.188.92]:59168) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nN0An-0006Yu-9g for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:49 -0500 Received: from [2607:f8b0:4864:20::1034] (port=45641 helo=mail-pj1-x1034.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nN0Al-0001CT-6M for qemu-devel@nongnu.org; Wed, 23 Feb 2022 17:31:48 -0500 Received: by mail-pj1-x1034.google.com with SMTP id bx9-20020a17090af48900b001bc64ee7d3cso326854pjb.4 for ; Wed, 23 Feb 2022 14:31:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8FniAxzNq9R5C3PUa8crK2rtgbWJQ/YT25+L7bxil2U=; b=mMRtQwqR+JIHKhxGCA+TZ6Lh4RIplVAtW7d2GOe2aabcU2ObhZz8nFysChL+X81uYZ HWxG1Bf7IW7vFrk3yTQm6igrjA8s2+t2b8iGEUjJ9Ndrh1UktS2JBDucZreqGrtciHF9 t077h2otJGdRO0C6HLeXi2car4sGQKJ7xY1xjENA9oSzNqV6mSxFq9s2imG1OJ+cMTdN OOyL2vNQ61SK9HcsHkabx0zrh1OmdoL8s1c8mYP0Ec5oFmefRJ1YcA6leHt8A8lzXdep AV4rUJbjhlbxtlkYAbpPEXV2fCzAEYI4W7CWLqaO4q3JXrYG7E3xI/9iA/M/gpzZdyxc LmVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8FniAxzNq9R5C3PUa8crK2rtgbWJQ/YT25+L7bxil2U=; b=dsisbiiQgZr02+i8BXajPD7UAfDAfMvC9a8kUI9lCOfDJHGkoYvdHHWJcm7nwmx8di oaVsPsJfvPv13+D+4hckeH08Hnxl9WOnWHCLy+3j40XNRSyPc6iOS0Jn0M/U0Pn42l3d NpnrglGX9A9JvQ0OB4HtRLi8Z1P6DDF+ZD2SDLhMHUtvdnFM30s2L/PK1igW26CVB5Qu PRMBf1lxSq+JYd52wX8mRoOq3Zf8wZuIjk74zbJpJ0bzIkkPt+YzYXId7JYSHt864CTY EMp8X1XMJTeNy/bDQv1aw9CyhjNSd6UEnDsBQgMi5Pt82BZh+bHytDi++eboX9JWoaZw rJCQ== X-Gm-Message-State: AOAM532FXzazjYxthyspgo9+MH5R/ldb1QNbByXezznjXo5zjzO7Zagf zvV/e9+5tYio1yPE2zFudeOgjou7oOpcxQ== X-Received: by 2002:a17:902:dcc9:b0:14f:edff:7df3 with SMTP id t9-20020a170902dcc900b0014fedff7df3mr1704151pll.154.1645655504906; Wed, 23 Feb 2022 14:31:44 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id f8sm533815pfv.100.2022.02.23.14.31.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 14:31:44 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 03/17] target/arm: Fault on invalid TCR_ELx.TxSZ Date: Wed, 23 Feb 2022 12:31:23 -1000 Message-Id: <20220223223137.114264-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220223223137.114264-1-richard.henderson@linaro.org> References: <20220223223137.114264-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1034 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1034.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Without FEAT_LVA, the behaviour of programming an invalid value is IMPLEMENTATION DEFINED. With FEAT_LVA, programming an invalid minimum value requires a Translation fault. It is most self-consistent to choose to generate the fault always. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- v2: Continue to bound in aa64_va_parameters, so that PAuth gets something it can use, but provide a flag for get_phys_addr_lpae to raise a fault. --- target/arm/internals.h | 1 + target/arm/helper.c | 32 ++++++++++++++++++++++++++++---- 2 files changed, 29 insertions(+), 4 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 3f05748ea4..ef6c25d8cb 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1055,6 +1055,7 @@ typedef struct ARMVAParameters { bool hpd : 1; bool using16k : 1; bool using64k : 1; + bool tsz_oob : 1; /* tsz has been clamped to legal range */ } ARMVAParameters; ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va, diff --git a/target/arm/helper.c b/target/arm/helper.c index 7bf50fdd76..dd4d95bda2 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11190,8 +11190,8 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va, ARMMMUIdx mmu_idx, bool data) { uint64_t tcr = regime_tcr(env, mmu_idx)->raw_tcr; - bool epd, hpd, using16k, using64k; - int select, tsz, tbi, max_tsz; + bool epd, hpd, using16k, using64k, tsz_oob; + int select, tsz, tbi, max_tsz, min_tsz; if (!regime_has_2_ranges(mmu_idx)) { select = 0; @@ -11232,9 +11232,17 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va, } else { max_tsz = 39; } + min_tsz = 16; /* TODO: ARMv8.2-LVA */ - tsz = MIN(tsz, max_tsz); - tsz = MAX(tsz, 16); /* TODO: ARMv8.2-LVA */ + if (tsz > max_tsz) { + tsz = max_tsz; + tsz_oob = true; + } else if (tsz < min_tsz) { + tsz = min_tsz; + tsz_oob = true; + } else { + tsz_oob = false; + } /* Present TBI as a composite with TBID. */ tbi = aa64_va_parameter_tbi(tcr, mmu_idx); @@ -11251,6 +11259,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va, .hpd = hpd, .using16k = using16k, .using64k = using64k, + .tsz_oob = tsz_oob, }; } @@ -11374,6 +11383,21 @@ static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address, param = aa64_va_parameters(env, address, mmu_idx, access_type != MMU_INST_FETCH); level = 0; + + /* + * If TxSZ is programmed to a value larger than the maximum, + * or smaller than the effective minimum, it is IMPLEMENTATION + * DEFINED whether we behave as if the field were programmed + * within bounds, or if a level 0 Translation fault is generated. + * + * With FEAT_LVA, fault on less than minimum becomes required, + * so our choice is to always raise the fault. + */ + if (param.tsz_oob) { + fault_type = ARMFault_Translation; + goto do_fault; + } + addrsize = 64 - 8 * param.tbi; inputsize = 64 - param.tsz; } else {