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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id q76sm7555778wme.1.2022.02.21.01.28.07 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Feb 2022 01:28:08 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 07/26] target/arm: Move '-cpu host' code to cpu64.c Date: Mon, 21 Feb 2022 09:27:41 +0000 Message-Id: <20220221092800.404870-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220221092800.404870-1-peter.maydell@linaro.org> References: <20220221092800.404870-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::32c (failed) Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Now that KVM has dropped AArch32 host support, the 'host' CPU type is always AArch64, and we can move it to cpu64.c. This move will allow us to share code between it and '-cpu max', which should behave the same as '-cpu host' when using KVM or HVF. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Andrew Jones Reviewed-by: Alexander Graf Reviewed-by: Richard Henderson Message-id: 20220204165506.2846058-2-peter.maydell@linaro.org --- target/arm/cpu.c | 30 ------------------------------ target/arm/cpu64.c | 30 ++++++++++++++++++++++++++++++ 2 files changed, 30 insertions(+), 30 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 5a9c02a2561..a4a229a65be 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -39,7 +39,6 @@ #include "sysemu/tcg.h" #include "sysemu/hw_accel.h" #include "kvm_arm.h" -#include "hvf_arm.h" #include "disas/capstone.h" #include "fpu/softfloat.h" @@ -2079,31 +2078,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) #endif /* CONFIG_TCG */ } -#if defined(CONFIG_KVM) || defined(CONFIG_HVF) -static void arm_host_initfn(Object *obj) -{ - ARMCPU *cpu = ARM_CPU(obj); - -#ifdef CONFIG_KVM - kvm_arm_set_cpu_features_from_host(cpu); - if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { - aarch64_add_sve_properties(obj); - aarch64_add_pauth_properties(obj); - } -#else - hvf_arm_set_cpu_features_from_host(cpu); -#endif - arm_cpu_post_init(obj); -} - -static const TypeInfo host_arm_cpu_type_info = { - .name = TYPE_ARM_HOST_CPU, - .parent = TYPE_AARCH64_CPU, - .instance_init = arm_host_initfn, -}; - -#endif - static void arm_cpu_instance_init(Object *obj) { ARMCPUClass *acc = ARM_CPU_GET_CLASS(obj); @@ -2151,10 +2125,6 @@ static const TypeInfo arm_cpu_type_info = { static void arm_cpu_register_types(void) { type_register_static(&arm_cpu_type_info); - -#if defined(CONFIG_KVM) || defined(CONFIG_HVF) - type_register_static(&host_arm_cpu_type_info); -#endif } type_init(arm_cpu_register_types) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 8786be7783e..052666b819e 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -30,6 +30,7 @@ #endif #include "sysemu/kvm.h" #include "kvm_arm.h" +#include "hvf_arm.h" #include "qapi/visitor.h" #include "hw/qdev-properties.h" @@ -681,6 +682,31 @@ void aarch64_add_pauth_properties(Object *obj) } } +#if defined(CONFIG_KVM) || defined(CONFIG_HVF) +static void arm_host_initfn(Object *obj) +{ + ARMCPU *cpu = ARM_CPU(obj); + +#ifdef CONFIG_KVM + kvm_arm_set_cpu_features_from_host(cpu); + if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { + aarch64_add_sve_properties(obj); + aarch64_add_pauth_properties(obj); + } +#else + hvf_arm_set_cpu_features_from_host(cpu); +#endif + arm_cpu_post_init(obj); +} + +static const TypeInfo host_arm_cpu_type_info = { + .name = TYPE_ARM_HOST_CPU, + .parent = TYPE_AARCH64_CPU, + .instance_init = arm_host_initfn, +}; + +#endif + /* -cpu max: if KVM is enabled, like -cpu host (best possible with this host); * otherwise, a CPU with as many features enabled as our emulation supports. * The version of '-cpu max' for qemu-system-arm is defined in cpu.c; @@ -1023,6 +1049,10 @@ static void aarch64_cpu_register_types(void) for (i = 0; i < ARRAY_SIZE(aarch64_cpus); ++i) { aarch64_cpu_register(&aarch64_cpus[i]); } + +#if defined(CONFIG_KVM) || defined(CONFIG_HVF) + type_register_static(&host_arm_cpu_type_info); +#endif } type_init(aarch64_cpu_register_types)