| Message ID | 20220208071710.320122-2-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | tcg/sparc: Unaligned access for user-only | expand |
On Tue, 8 Feb 2022 at 07:17, Richard Henderson <richard.henderson@linaro.org> wrote: > > When BH is constant, it is constrained to 10 bits for use in MOVCC. Where does this happen? I assumed it was going to be done by the constraint encodings, but tcg_out_addsub2_i64() is called for the add2_i64 and sub2_i64 ops, which get return C_O2_I4(r, r, rZ, rZ, rJ, rJ); and constraint J is CONST('J', TCG_CT_CONST_S13). (and indeed there is no "constrain to 10 bits" letter). thanks -- PMM
On 2/8/22 21:40, Peter Maydell wrote: > On Tue, 8 Feb 2022 at 07:17, Richard Henderson > <richard.henderson@linaro.org> wrote: >> >> When BH is constant, it is constrained to 10 bits for use in MOVCC. > > Where does this happen? I assumed it was going to be done > by the constraint encodings, but tcg_out_addsub2_i64() > is called for the add2_i64 and sub2_i64 ops, which get > > return C_O2_I4(r, r, rZ, rZ, rJ, rJ); > and constraint J is > CONST('J', TCG_CT_CONST_S13). > (and indeed there is no "constrain to 10 bits" letter). Typo/thinko with 10 bit vs 11 bit: CONST('I', TCG_CT_CONST_S11) But there are different constraints for add2_i32 and add2_i64: case INDEX_op_add2_i32: case INDEX_op_sub2_i32: return C_O2_I4(r, r, rZ, rZ, rJ, rJ); ... case INDEX_op_add2_i64: case INDEX_op_sub2_i64: return C_O2_I4(R, R, RZ, RZ, RJ, RI); r~
On Tue, 8 Feb 2022 at 11:09, Richard Henderson <richard.henderson@linaro.org> wrote: > > On 2/8/22 21:40, Peter Maydell wrote: > > On Tue, 8 Feb 2022 at 07:17, Richard Henderson > > <richard.henderson@linaro.org> wrote: > >> > >> When BH is constant, it is constrained to 10 bits for use in MOVCC. > > > > Where does this happen? I assumed it was going to be done > > by the constraint encodings, but tcg_out_addsub2_i64() > > is called for the add2_i64 and sub2_i64 ops, which get > > > > return C_O2_I4(r, r, rZ, rZ, rJ, rJ); > > and constraint J is > > CONST('J', TCG_CT_CONST_S13). > > (and indeed there is no "constrain to 10 bits" letter). > > Typo/thinko with 10 bit vs 11 bit: > > CONST('I', TCG_CT_CONST_S11) > > But there are different constraints for add2_i32 and add2_i64: > > case INDEX_op_add2_i32: > case INDEX_op_sub2_i32: > return C_O2_I4(r, r, rZ, rZ, rJ, rJ); > ... > case INDEX_op_add2_i64: > case INDEX_op_sub2_i64: > return C_O2_I4(R, R, RZ, RZ, RJ, RI); Yes, I must have been looking at the _i32 lines by mistake. If you fix the 10s and 11s to 11s and 12s: Reviewed-by: Peter Maydell <peter.maydell@linaro.org> thanks -- PMM
diff --git a/tcg/sparc/tcg-target.c.inc b/tcg/sparc/tcg-target.c.inc index 0c062c60eb..82a7c684b6 100644 --- a/tcg/sparc/tcg-target.c.inc +++ b/tcg/sparc/tcg-target.c.inc @@ -795,7 +795,7 @@ static void tcg_out_addsub2_i64(TCGContext *s, TCGReg rl, TCGReg rh, if (use_vis3_instructions && !is_sub) { /* Note that ADDXC doesn't accept immediates. */ if (bhconst && bh != 0) { - tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_T2, bh); + tcg_out_movi_imm13(s, TCG_REG_T2, bh); bh = TCG_REG_T2; } tcg_out_arith(s, rh, ah, bh, ARITH_ADDXC); @@ -811,9 +811,13 @@ static void tcg_out_addsub2_i64(TCGContext *s, TCGReg rl, TCGReg rh, tcg_out_movcc(s, TCG_COND_GEU, MOVCC_XCC, rh, ah, 0); } } else { - /* Otherwise adjust BH as if there is carry into T2 ... */ + /* + * Otherwise adjust BH as if there is carry into T2. + * Note that constant BH is constrained to 10 bits for the MOVCC, + * so the adjustment fits 11 bits. + */ if (bhconst) { - tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_T2, bh + (is_sub ? -1 : 1)); + tcg_out_movi_imm13(s, TCG_REG_T2, bh + (is_sub ? -1 : 1)); } else { tcg_out_arithi(s, TCG_REG_T2, bh, 1, is_sub ? ARITH_SUB : ARITH_ADD);
When BH is constant, it is constrained to 10 bits for use in MOVCC. For the cases in which we must load the constant BH into a register, we do not need the full logic of tcg_out_movi; we can use the simpler function for emitting a 13 bit constant. This eliminates the only case in which TCG_REG_T2 was passed to tcg_out_movi, which will shortly become invalid. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- tcg/sparc/tcg-target.c.inc | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-)