From patchwork Fri Feb 4 16:55:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 539868 Delivered-To: patch@linaro.org Received: by 2002:ac0:f7d2:0:0:0:0:0 with SMTP id i18csp3410121imr; Fri, 4 Feb 2022 09:01:16 -0800 (PST) X-Google-Smtp-Source: ABdhPJw+naeecDP/d4g0e2h0DyLmdEfEiOPR55aERxEl5+89mpsPSIPZ6C518C6XU3qKATH/4nHw X-Received: by 2002:a05:620a:16ca:: with SMTP id a10mr25794qkn.108.1643994076793; Fri, 04 Feb 2022 09:01:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1643994076; cv=none; d=google.com; s=arc-20160816; b=hoZzI5/9kuJQR8i9wF/o9dANRSeEPr14M8uW9Wo8DneS72FsUhSRBnHSIOmwEuUnDJ 2L4HcK8H79wKKgayT/f4x0HWFFWMJErGJxQ7OX9oABlk2G8U2OmBUa+gB7PL2tZsZTFw H8JhS/3FL2PspgB/l6LswREehP5qRFx+2ImQ2YArsYqnpQY9gCjJol6chvSgJVvpUN2i MWSa3cnb6zNukIdE+x8csOX+8HVITd0YM9GvQNm8WLnmAYjJ19pvSa9EM3S2COF2cXlv PB30xBx5sCovZJBAEQZYNYijoSSJxhpNYGzOOm1pFdF6YF8RBkCz+ilIFbT7obsRx8Ag SC8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=tjcvPV/juuMIi4sRDbbU/TdIgPLoSlWdDbYJe45BCYc=; b=w3YaSri6ldlosQgIbEY+OwPhebI66Tc6YhbHApQhyEdocmSlCF8LAoFhFHEZsqNYDr 5WdZPggBPJoBo/BSvkv+gdOeM9hKAmc5c8Yjd7qkI4qMSRued9eJw5AUY+inCgttd4Ga IUPC99Cy4XK/7dU/5OFi02klgy4a6G9UpEDbLTyvxlCJQe2eUgjF1yIh2wcTdt8iRjTX 8MSgA75wlV2rdTwMomTql3ppVqxcPnkn99gP5WXq0qaXa8O8pu4LGyJIR/wbs9kgNesc mCQNHtp8VgYNMNYpOv72sNzNgSnIn7YtAaNKzrDjsqS/dKl0TZ+bltwAOBZSwU+P2u1Q nDEQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=KxLxce1+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 35si526073qte.336.2022.02.04.09.01.16 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 04 Feb 2022 09:01:16 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=KxLxce1+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:34976 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nG1xU-0005Ie-4c for patch@linaro.org; Fri, 04 Feb 2022 12:01:16 -0500 Received: from eggs.gnu.org ([209.51.188.92]:53836) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nG1sH-0002y7-LO for qemu-devel@nongnu.org; Fri, 04 Feb 2022 11:55:53 -0500 Received: from [2a00:1450:4864:20::434] (port=39608 helo=mail-wr1-x434.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nG1rp-0003BS-Ka for qemu-devel@nongnu.org; Fri, 04 Feb 2022 11:55:39 -0500 Received: by mail-wr1-x434.google.com with SMTP id r17so3414088wrr.6 for ; Fri, 04 Feb 2022 08:55:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tjcvPV/juuMIi4sRDbbU/TdIgPLoSlWdDbYJe45BCYc=; b=KxLxce1+gFmcvFNrRLL2/maGEvJQmt0Hf0OlZuvPiuK1w5Ab3SxyurA45jGZUA/JZI Z4EaOa2pN+i5gYFVJloKQwcbED0T94XcGl2AS0YEvm74S4pnJWtX4JSXYN5TUmLe3oY4 M/JVQ2urRY4NTZ04/5XnCniGrrcvh94IIAJtwLms5cCAiOiNdkbVx3rLbgWVJp6ox82X pZLV/LIuNnmvAhzVRWjTw7LLV+SduwyRJC4l63iobRo0PUYiWv8XvxGPTEl8AL8lHm4j QuuhLw8UYqke81nz9cJJ2SNbPoTq8206bV3LwI+28b4/u0OGDA82ZlD/3D1/BdKk+oeW eD6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tjcvPV/juuMIi4sRDbbU/TdIgPLoSlWdDbYJe45BCYc=; b=4H9PuavoPNEiDh68ArBmmX7bqbFUTRf+U8b/Od0y26L8/KfHebhWrwNEabigOe9sDP +fmFh5H1fwGQ5JO1B1+xwrbRmdWtN40+OZOY95FfdYCRHGpmalMrlAOS+sIal1H1l99f uzvJgyaitWfPyR1JoJ5Pq9EEt3qcNtimHcRs7bCfuz9mFMf7oa98oIglTZg0ZrvO+Jfj O1w02brHxXI8MxzbCZiykEvmJ45m6VkadGPUwnjgHge+B9wKONl7fH14A8qP0ayZuL3x xc5uwuMWmziwxdxiXgjygD/r0t+cuz6bDmfi9oNi3RMEkhuHmFznsWmS7rkSwyNjfsbH RejA== X-Gm-Message-State: AOAM5315OWYG8jklujlgi+CpDvZ3E/z8LdQFrTljEgH/QKckJauU3RRK 26+zklgvLq9MbosRKf0RYn247w== X-Received: by 2002:a05:6000:1a46:: with SMTP id t6mr2359874wry.49.1643993709904; Fri, 04 Feb 2022 08:55:09 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id f12sm2486254wrs.1.2022.02.04.08.55.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Feb 2022 08:55:09 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 2/6] target/arm: Use aarch64_cpu_register() for 'host' CPU type Date: Fri, 4 Feb 2022 16:55:02 +0000 Message-Id: <20220204165506.2846058-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220204165506.2846058-1-peter.maydell@linaro.org> References: <20220204165506.2846058-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::434 (failed) Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jones , Alexander Graf Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Use the aarch64_cpu_register() machinery to register the 'host' CPU type. This doesn't gain us anything functionally, but it does mean that the code for initializing it looks more like that for the other CPU types, in that its initfn then doesn't need to call arm_cpu_post_init() (because aarch64_cpu_instance_init() does that for it). Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/cpu64.c | 17 ++++------------- 1 file changed, 4 insertions(+), 13 deletions(-) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 052666b819e..590ac562714 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -683,7 +683,7 @@ void aarch64_add_pauth_properties(Object *obj) } #if defined(CONFIG_KVM) || defined(CONFIG_HVF) -static void arm_host_initfn(Object *obj) +static void aarch64_host_initfn(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -696,15 +696,7 @@ static void arm_host_initfn(Object *obj) #else hvf_arm_set_cpu_features_from_host(cpu); #endif - arm_cpu_post_init(obj); } - -static const TypeInfo host_arm_cpu_type_info = { - .name = TYPE_ARM_HOST_CPU, - .parent = TYPE_AARCH64_CPU, - .instance_init = arm_host_initfn, -}; - #endif /* -cpu max: if KVM is enabled, like -cpu host (best possible with this host); @@ -943,6 +935,9 @@ static const ARMCPUInfo aarch64_cpus[] = { { .name = "cortex-a72", .initfn = aarch64_a72_initfn }, { .name = "a64fx", .initfn = aarch64_a64fx_initfn }, { .name = "max", .initfn = aarch64_max_initfn }, +#if defined(CONFIG_KVM) || defined(CONFIG_HVF) + { .name = "host", .initfn = aarch64_host_initfn }, +#endif }; static bool aarch64_cpu_get_aarch64(Object *obj, Error **errp) @@ -1049,10 +1044,6 @@ static void aarch64_cpu_register_types(void) for (i = 0; i < ARRAY_SIZE(aarch64_cpus); ++i) { aarch64_cpu_register(&aarch64_cpus[i]); } - -#if defined(CONFIG_KVM) || defined(CONFIG_HVF) - type_register_static(&host_arm_cpu_type_info); -#endif } type_init(aarch64_cpu_register_types)