| Message ID | 20220202191242.652607-3-alex.bennee@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | improve coverage of vector backend | expand |
On 2/3/22 06:12, Alex Bennée wrote: > The aim of this is to test code generation for vectorised operations. > Unfortunately gcc struggles to do much with the messy sha1 code (try > -fopt-info-vec-missed to see why). However it's better than nothing. > > We assume the non-vectorised output is gold and baring compiler bugs > the outputs should match. > > Signed-off-by: Alex Bennée <alex.bennee@linaro.org> > --- > tests/tcg/aarch64/Makefile.target | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target > index 1d967901bd..a03844ce48 100644 > --- a/tests/tcg/aarch64/Makefile.target > +++ b/tests/tcg/aarch64/Makefile.target > @@ -50,6 +50,18 @@ sysregs: CFLAGS+=-march=armv8.1-a+sve > AARCH64_TESTS += sve-ioctls > sve-ioctls: CFLAGS+=-march=armv8.1-a+sve > > +# Vector SHA1 > + > +sha1-vector: CFLAGS=-march=armv8.1-a+sve -O3 For testing host vector operations, sve is not ideal -- you'll wind up with too many predicated operations that can't be vectorized by tcg. (I wish sve had used a dedicated "true" predicate, which could be detected at translation. Alas...) r~
diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index 1d967901bd..a03844ce48 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -50,6 +50,18 @@ sysregs: CFLAGS+=-march=armv8.1-a+sve AARCH64_TESTS += sve-ioctls sve-ioctls: CFLAGS+=-march=armv8.1-a+sve +# Vector SHA1 + +sha1-vector: CFLAGS=-march=armv8.1-a+sve -O3 +sha1-vector: sha1.c + $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) + +run-sha1-vector: sha1-vector run-sha1 + $(call run-test, $<, $(QEMU) $(QEMU_OPTS) $<, "$< on $(TARGET_NAME)") + $(call diff-out, sha1-vector, sha1.out) + +TESTS += sha1-vector + ifneq ($(HAVE_GDB_BIN),) GDB_SCRIPT=$(SRC_PATH)/tests/guest-debug/run-test.py
The aim of this is to test code generation for vectorised operations. Unfortunately gcc struggles to do much with the messy sha1 code (try -fopt-info-vec-missed to see why). However it's better than nothing. We assume the non-vectorised output is gold and baring compiler bugs the outputs should match. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> --- tests/tcg/aarch64/Makefile.target | 12 ++++++++++++ 1 file changed, 12 insertions(+)